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TUSB211: D+/D1 leakage problem from CPU 3.3V_Aux power source

Part Number: TUSB211

Hi team,

Our customer is using the USB re-driver TUSB211 in their design. And It's good without any problem.

But they would like to ask another question, if you have any experience before please share with us.

Their USB routing as picture below.

When the USB device already plugged in the USB port and power on the system.

The 5V_Standby power will leakage voltage to 3V3_AUX through D+/D- about 0.2V~0.3V.

(They can see the signal step rising on 3V3_AUX, have you ever faced this problem? How can we avoid this leakage voltage? Add capacitor on the USB 2.0 interface?

Please advise

Thanks

  • where the 5V-stanfby voltage come from , any relationship between 5v_standby and 3.3_aux?

    regards,

    brian

  • Brian,

    The 5V Standby is the voltage converted from MB (mother Board) because the CPU Board is plugged in separately, the voltage of the CPU Board will rise a little bit later than the MB. MB's 5V Standby has no relationship with CPU board's 3.3_aux They think the power of the USB device is 5V Standby.

    When the MB is powered on, the USB device is active and sends the USB signal to the CPU. At this time, the CPU Power has not yet started. This tiny 0.1V~0.2V causes the CPU to leak internally to the connected power supply, including 3.3V_AUX 3.3V_AUX will first climb to 0.1~0.2V and then to 3.3V during Rising But if you don't connect the USB device when AC adaptor is on, you won't see this leakage.

    This is a very special problem, They also encountered it for the first time
    So My customer wants to ask if TI has encountered many cases, whether there have been similar situations?
    TThanks
  • Paul:

         When CPU board is off and MB is on, DP/DM voltage from MB board could cause leakage to the CPU board though DP/DM signal.

    Regards,

    Brian