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SN65DSI86: Enabling color bar generator

Lo2
Expert 1915 points
Part Number: SN65DSI86
Other Parts Discussed in Thread: TEST2

Hello,


I'm using a dsi86. And I'm trying to show the colorbar test
on my display, so, not using video from the mipi bus yet.

The DSI86 is using the DSI clock.
The clock is set at 460.2MHz. I have verified it with a scope.
The pll locks, and remains locked.
The auto negotiation succeeds.
But I don't see any color bars. The screen remains black.

I used the DSI tool to generate the register settings
and I checked them manually as well.

The start up sequences is included below.
Any idea what might go wrong?

At this point, the chip is enabled & visible over i2c.

$ i2cdetect -y 2
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:          -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- 2c -- -- --
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: -- -- -- -- -- -- -- --

# We have some gpio pins that need to be set.
# These are set correctly, so i2c interface seems ok.
$ i2cset -y 2 0x2c 0x5E 0x0C
$ i2cset -y 2 0x2c 0x5F 0x50

# reset registers
$ i2cset -y 2 0x2c 0x09 0x01
$ i2cset -y 2 0x2c 0x5A 0x00
$ i2cset -y 2 0x2c 0x0D 0x00
$ i2cset -y 2 0x2c 0x09 0x01

# select clock
# 3-1: 100 - DSIA clk at 460MHz
$ i2cset -y 2 0x2c 0x0A 0x09
$ i2cget -y 2 0x2c 0x0A
0x09

# dsi
# 6-5: 01 - single channel
# 4-3: 00 - 4 lanes
$ i2cset -y 2 0x2c 0x10 0x26
$ i2cset -y 2 0x2c 0x11 0x00

# dsi clock range
# 7:0: 5C - 460.2MHz
$ i2cset -y 2 0x2c 0x12 0x5C
$ i2cset -y 2 0x2c 0x13 0x5C

# disable enhanced framing & set ASSR
$ i2cset -y 2 0x2c 0x5A 0x00
# DP color format - 24bpp
$ i2cset -y 2 0x2c 0x5B 0x00

# 2 lanes - spread spectrum disabled
$ i2cset -y 2 0x2c 0x93 0x24

# select datarate (we need 2.7Gbps to do 1920*1080@60 over 2 lanes)
$ i2cset -y 2 0x2c 0x94 0x80

# set resolution (extracted from EDID)
# 1920 * 1080
# hori - FP: 58 - SYNC: 42 - BP: 88
# vert - FP:  8 - SYNC: 14 - BP: 16

$ i2cset -y 2 0x2c 0x20 0x80
$ i2cset -y 2 0x2c 0x21 0x07
$ i2cset -y 2 0x2c 0x24 0x38
$ i2cset -y 2 0x2c 0x25 0x04
$ i2cset -y 2 0x2c 0x2C 0x2a
$ i2cset -y 2 0x2c 0x2D 0x00
$ i2cset -y 2 0x2c 0x30 0x0E
$ i2cset -y 2 0x2c 0x31 0x00
$ i2cset -y 2 0x2c 0x34 0x58
$ i2cset -y 2 0x2c 0x36 0x10
$ i2cset -y 2 0x2c 0x38 0x3A
$ i2cset -y 2 0x2c 0x3A 0x08

# enable colorbar
$ i2cset -y 2 0x2c 0x3C 0x18

# enable pll
$ i2cset -y 2 0x2c 0x0D 0x01
# check if pll is locked - MSB must be set.
$ i2cget -y 2 0x2c 0x0A
0x89
# this returns 0x89 -> pll is locked.

# start semi auto link
$ i2cset -y 2 0x2c 0x96 0x0A
$ i2cget -y 2 0x2c 0x96
0x01
# this returns 0x01 -> link ok + switched to normal mode

# Enable video stream - disable ASSR & enhanced framing
$ i2cset -y 2 0x2c 0x5A 0x08

# Dumping the registers afterwards
$ i2cdump -y 2 0x2c
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 36 38 49 53 44 20 20 20 02 00 89 00 00 01 00 00    68ISD   ?.?..?..
10: 26 00 5c 5c 00 00 00 00 00 00 00 00 00 00 00 00    &.\\............
20: 80 07 00 00 38 04 00 00 00 00 00 00 2a 00 00 00    ??..8?......*...
30: 0e 00 00 00 58 00 10 00 3a 00 08 00 10 00 00 00    ?...X.?.:.?.?...
40: 09 43 00 00 80 00 3c 08 5e 04 82 00 1e 00 2a 00    ?C..?.<?^??.?.*.
50: 0e 00 80 07 38 04 20 00 40 e4 09 00 10 00 fc 50    ?.??8? .@??.?.?P
60: a0 60 a4 00 00 08 00 00 00 00 00 00 00 00 00 00    ?`?..?..........
70: 00 00 00 00 00 01 02 01 80 81 00 00 00 00 00 00    .....?????......
80: 00 00 00 00 00 00 00 00 00 1f 7c f0 c1 07 1f 7c    .........?|????|
90: f0 c1 07 64 80 00 01 04 01 00 00 00 00 00 00 00    ???d?.???.......
a0: 01 ff ff 00 00 00 00 00 00 00 00 00 00 00 00 00    ?...............
b0: 04 78 ac ac 08 6c 9c 9c 0c 5c 5c 5c 0c 0c 0c 0c    ?x???l???\\\????
c0: 3f 3f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00    ???.............
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 23 00 00 00 02 00 00 01 00 00 00 00 00 00 00    .#...?..?.......


What could be the reason I have a black screen instead of a colorbar?

Best regards,

Lo2

  • +1
    TI__Guru*** 139405 points

    Lo2

    Instead the DSI tuner, please use the spreadsheet to generate the DSI86 register programming value. You can find the spreadsheet in this e2e link, https://e2e.ti.com/support/interface-group/interface/f/interface-forum/945404/faq-sn65dsi86-how-do-i-programming-the-sn65dsi86-registers.

    To disable ASSR, pull TEST2 pin to 1.8V thru a 1k to 10k resistor. Once TEST2 is high, the following steps must be performed:

    1. Write 0x07 to register 0xFF. This will select Page 7.
    2. Write 0x01 to register 0x16. This will make ASSR_CONTROL to be read/write.
    3. Write 0x00 to register 0xFF. This will select Page 0.
    4. Write 0 to bits 1:0 at register 0x5A. This will change from ASSR to Standard DP.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Expert 1915 points

    Hallo David,

    thanks for your response. The spreadsheet does not support clocking from the MIPI clock, so we had to adjust the settings for clocking.

    Apparently the ASSR is required for our panel, but this is poorly documented.

    Is there some additional information on ASSR available?

    What does the following sequence do?

    # enable assr on panel (native aux command)
    i2cset -y 2 0x2c 0x64 0x01
    i2cset -y 2 0x2c 0x74 0x00
    i2cset -y 2 0x2c 0x75 0x01
    i2cset -y 2 0x2c 0x76 0x0A
    i2cset -y 2 0x2c 0x77 0x01
    i2cset -y 2 0x2c 0x78 0x81

    (it's generated by the spreadsheet)

    This is our current script:

    # chipset enable
    (gpio settings)

    # chip now visible (2c)
    # i2cdetect -y 2

    # set gpio pin3 high
    i2cset -y 2 0x2c 0x5E 0x0C
    i2cset -y 2 0x2c 0x5F 0x50

    # reset registers
    i2cset -y 2 0x2c 0x09 0x01

    # select clock
    # 3-1: 100 - DSIA clk at 460MHz
    i2cset -y 2 0x2c 0x0A 0x09
    i2cget -y 2 0x2c 0x0A

    # dsi
    # 6-5: 01 - single channel
    # 4-3: 00 - 4 lanes
    i2cset -y 2 0x2c 0x10 0x26

    # dsi clock range
    # 7:0: 5C - 460.2MHz
    i2cset -y 2 0x2c 0x12 0x5C
    i2cset -y 2 0x2c 0x13 0x5C

    # select datarate (we need 2.7Gbps to do 1920*1080@60 over 2 lanes)
    i2cset -y 2 0x2c 0x94 0x80

    ### enable pll
    i2cset -y 2 0x2c 0x0D 0x01
    # check if pll is locked - MSB must be set.
    i2cget -y 2 0x2c 0x0A
    # this returns 0x89 -> pll = locked.

    # enable assr on panel (native aux command)
    i2cset -y 2 0x2c 0x64 0x01
    i2cset -y 2 0x2c 0x74 0x00
    i2cset -y 2 0x2c 0x75 0x01
    i2cset -y 2 0x2c 0x76 0x0A
    i2cset -y 2 0x2c 0x77 0x01
    i2cset -y 2 0x2c 0x78 0x81

    # enable enhanced framing & ASSR
    i2cset -y 2 0x2c 0x5A 0x05

    # 2 lanes - disable spread spectrum
    i2cset -y 2 0x2c 0x93 0x20

    ### start semi auto link
    i2cset -y 2 0x2c 0x96 0x0A
    i2cget -y 2 0x2c 0x96
    # this returns 0x01 -> link ok + switched to normal

    ### set resolution (calculated with excel sheet)
    # active line length
    i2cset -y 2 0x2c 0x20 0x80
    i2cset -y 2 0x2c 0x21 0x07
    # vertical active size
    i2cset -y 2 0x2c 0x24 0x38
    i2cset -y 2 0x2c 0x25 0x04
    # horizontal pulse width
    i2cset -y 2 0x2c 0x2C 0x20
    i2cset -y 2 0x2c 0x2D 0x00
    # vertical pulse width
    i2cset -y 2 0x2c 0x30 0x0A
    i2cset -y 2 0x2c 0x31 0x00
    # HBP
    i2cset -y 2 0x2c 0x34 0x50
    # VBP
    i2cset -y 2 0x2c 0x36 0x11
    # HFP
    i2cset -y 2 0x2c 0x38 0x30
    # VFP
    i2cset -y 2 0x2c 0x3A 0x03

    # DP color format - 24bpp
    i2cset -y 2 0x2c 0x5B 0x00

    ### colorbar
    i2cset -y 2 0x2c 0x3C 0x10

    # Enable video stream - enable ASSR & enhanced framing
    i2cset -y 2 0x2c 0x5A 0x0D

    Best regards,

    Lo2

  • 0 in reply to Lo2
    TI__Guru*** 139405 points

    Lo2

    Please note that when using the REFCLK as the clock source, any DSI Clock frequency is supported. But if the clock source was instead the DSI A clock, then the required DSI Clock frequency would need to change to a frequency supported by the DSI86. When operating in this mode, any one of the following DSI A clock frequencies can be used: 384 MHz, 416 MHz, 460.8 MHz, 468 MHz, or 486 MHz.

    If the panel supports ASSR, then the following command is a Native AUX write to the panel DPCD register to enable the ASSR function. 

    # enable assr on panel (native aux command)
    i2cset -y 2 0x2c 0x64 0x01
    i2cset -y 2 0x2c 0x74 0x00
    i2cset -y 2 0x2c 0x75 0x01
    i2cset -y 2 0x2c 0x76 0x0A
    i2cset -y 2 0x2c 0x77 0x01
    i2cset -y 2 0x2c 0x78 0x81

    Can you read status register 0xF8 and see if the link training is successful when the color bar function is enabled? If the link training is successful, I would try to disable the ASSR in DSI86 and see if you can get color bar on the screen.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Expert 1915 points

    Hi David,

    sorry my response was ambiguous: using the generated spreadsheet initialization the display does show the color bars. But it only works with ASSR enabled.

    I was wondering what those bytes in the native aux command do. Which protocol is this?

    Anyway, this one panel works now, thanks a lot!

    Should I need  another panel, I will then test it with/without ASSR.

    Best regards,

    Lo2

  • 0 in reply to Lo2
    TI__Guru*** 139405 points

    Lo2

    It's good to hear that you managed to get the panel working.

    For your question, I would reference you to section 8.4.5.2.1 Native Aux Transactions of the DSI86 datasheet. Basically you are writing to the DSI86 I2C registers and DSI86 takes the value in the I2C registers and converts to Native AUX write on the DP AUX bus. 

    In this particular case, the DSI86 is sending a Native AUX Write (Register 0x78 = 0x81) to the Panel DPCD register 0x0010Ah (Register 0x74 = 0x00, 0x75 = 0x01, and 0x76 = 0x0A). It is a one byte write (0x77 = 0x01), and the write value to the DPCD register 0x0010Ah is 0x01 (Register 0x64 = 0x01).

    Thanks

    David