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DS90UB960-Q1: ALP Margin Analysis

Part Number: DS90UB960-Q1
Other Parts Discussed in Thread: ALP, USB2ANY

Hi,

I have been trying to use the ALP Margin Analysis tool to validate our DS90UB960 design but I am facing some problems. My setup is composed by our ECU, which includes the DS90UB960, and DS90UB953EVM on the other part of the video link. I connect via USB directly to the DS90UB953EVM, and to the DS90UB960 through the backchannel. Seems that the connection is OK because I can detect both SER and DES on the ALP.

I am using PORT 0 to do the Margin Analysis, but I am always obtaining red results in all EQ/SP positions.

Additionaly, when I perform Margin Analysis test, I loss the communication on the link utill I restart the board.

I also tryied to use a DS90UB960-Q1EVM with the same results (using both EVM). 

Last test I have done is changing the coax cables. Same result.

Do you have any idea that what is happening? Could be a configuration problem?

Thank you in advance.

  • Carlos,

    Thanks for the screen shots.

    I suppose you are using an external usb2any dongle to connect to your 960 design. Is that right?

    On your custom 960 design  do you have a MCU acting as the 960 i2c master? If so could you disconnect the MCU from I2C bus? When margin analysis is run, it is better there is no other i2c master doing initializations. 

    When you are just using 960EVM and 953EVM please share info tab. Could you double check you are running margin analysis on the correct port? Also, when using EVMs you don't need external usb2any.

    Thanks,

    Vishy

  • Hello Vishy,

    I am not using the external usb2any dongle to connect to out design. I am connecting with the 953 EVM via USB, and then if I change de Device on the ALP I am able to connect to the 960, I am assuming that the connection is stablished through the FPDLINK backchannel. Could this be the cause of the fail? Maybe the connection to the 960 is lost when the FPDLINK margin test is configured and I am not able to read the results correctly?

    In our custom design, we have an I2C master doing this initilization process. I will try to disconnect this I2C to avoid the master configuration. If the DES is not configured, 

    Regarding the 960EVM adn the 953EVM. I finally have been able to pass the tests. The problem was something related with the coaxial cables.

    Thank you for your support

    Carlos

  • Carlos,

    >>>>>I am not using the external usb2any dongle to connect to out design. I am connecting with the 953 EVM via USB, and then if I change de Device on the ALP I am able to connect to the 960, I am assuming that the connection is stablished through the FPDLINK backchannel. Could this be the cause of the fail? Maybe the connection to the 960 is lost when the FPDLINK margin test is configured and I am not able to read the results correctly?

    I am not sure how reliable this connection would be. A direct method to try instead is to directly connect SDA, SCL, and GND pins (J6 of 953 EVM) to your custom board 960's I2C bus and GND. Then restart ALP and with 960 profile. Check if 960 register window works and verify in scripting tab you can read 953 slave id correctly from register 0x0 (just do "board.ReadI2C(953i2cSlaveAlias, 0x0)"). Then try Margin Analysis.

    Thanks,

    Vishy

  • Thank you Vishy, this way I have been able to launch the MAP on our custom design. Still debugging for better performance but it looks promising.