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TCAN4550-Q1: TCAN4550-Q1 - extra bytes 0x00 being read with revision ID and DevID registers

Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TMS320C6746, TCAN4550

hello, we are using tms320c6746 with tcan4550 , below issue

-  when i read Revision  register, address 0x008

it get following bytes - 0x0800110201

the problem is that i get the extra byte 0x08 as first byte , then it to receiver 00 11 02 

after that i send more 8 clocks and get the remaing byte 01 of Revision register,

regards

lakh

  • Hi Iakh,

    I'm not sure I fully understand your description. Could you please describe the second part of the problem here? 

    TCAN4550 uses a 32 bits register format. It sounds like your read function returned too long of a result, possibly because more than 32 bits were read from TCAN4550. In case that more than 32 bits are read from a register, the address will continue to increment and the following register will be read. In this case, the most significant byte in this answer is likely the first byte of the Status register (h000C). 0x08 is an expected value for the first byte of this register, so this seems normal. 

    I would suggest that the SPI read function is checked to ensure the format described by TCAN4550's datasheet is followed correctly. 

    Regards,
    Eric Schott

  • Hello Eric,

     thanks for information, i had problem with the controller spi functions to read/write tcan455x, on every written byte, need to read the spi receive buffer, else microconotroller put in spi error state of overrun of microcontroller , so i read incorrect data 

  • Hi Iakh,

    I'm glad you were able to find the source of the problem. Is there anything else we can help with? If not, please help us by clicking the Resolved button to close the thread. You can always ask a related question to link the new thread to this one. 

    Regards,
    Eric Schott