This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65DP159: Can the SN65DP159 report PLL sync loss?

Part Number: SN65DP159
Other Parts Discussed in Thread: TDP142, SN65DP141

We are looking at the SN65DP159 as an in-line DP to DP equalizer and we would like to monitor the PLL Control and Status Registers (address = 0x00) bit 7 "PLL_CLOCK" to identify loss of sync events on the input signaling. Once the link is established and has a functional lock the bit will change to locked. If input sync is lost  its not clear if this bit will update  to a "0" to indicated loss of sync/lock. 

In SLLA358 it seems to indicate that the controlling mcu will need to monitor loss of sync and reinitialize the DP159 settings. Could the MCU presumably use the PLL Lock indicator bit as indication of this event?