DS90UB925Q-Q1: Problem with unlocking status of DS90UB928QEVM

jingheng cao

Prodigy 20 points

Part Number: DS90UB925Q-Q1
Other Parts Discussed in Thread: DS90UB928QEVM

Dear TI Teams:

Now I am testing an onboard DS90UB925 with the Deserializer DS90UB928, below is the detailed information:

Test equipment:
- DRA74X/DAR75X/TDA2X CPU Board
- DS90UB928QEVM
Test condition
- HW
  - Connect the two board with FPDLink Cable, this cable is ok when I test with 949 to 928
  - DRA7xx EVM + 12V supply for the EVM
  - 12V power supply for De-serializer board
- SW
  - DS90UB925 just power on, no video signals appling on the pclk/hs/vs/de/vin[23:0] pins
  - DS90UB928QEVM PDB keep high, LFMODE MAPSEL BISTEN OEN BISTC OSS_SEL all low, normal operation.
RESULT
- DS90UB928QEVM pass signal keep high, but the lock signal always keep low.
- We can dump 925 reg list as below
- 0000: 36 00 00 d2 80 00 00 00 00 00 00 00 01 a0 00 00 6...............
  0010: 00 00 00 1a 00 00 fe 5e a1 a5 00 00 00 00 00 00 .......^........
  0020: 00 00 25 00 00 00 00 00 00 24 00 a0 00 00 00 00 ..%......$......
  0030: 03 10 00 00 00 00 08 34 00 0a 20 21 00 00 f0 00 .......4.. !....
  0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  0050: 2f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 /...............
  0060: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00 ................
  0070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  00a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  00b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  00c0: 00 00 80 00 48 08 00 00 40 00 00 00 00 00 00 00 ....H...@.......
  00d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
  00f0: 5f 55 42 39 32 35 00 00 00 00 00 00 00 00 00 _UB925.........
- You can see just link on reg 0xc[0], no DES ID on reg 0x6
Futher try
- I set ds90ub925 to generate a pattern use internal clock, no effect. The reg setting is shown below
- 0x66 0x03
  0x67 0x06
  0x66 0x07
  0x67 0x20
  0x66 0x08
  0x67 0x03
  0x66 0x09
  0x67 0x1e
  0x66 0x04
  0x67 0x98
  0x66 0x05
  0x67 0xd4
  0x66 0x06
  0x67 0x20
  0x66 0x0c
  0x67 0xd8
  0x66 0x0d
  0x67 0x23
  0x66 0x0a
  0x67 0x0a
  0x66 0x0b
  0x67 0x02
  0x66 0x0e
  0x67 0x03
  0x66 0x03
  0x67 0x11
Questions
- Why ds90ub928 can lock? This board can lock when testing with ds90ub949 evm board.
- If I should apply signals on the pclk/hs/vs/de/vin[23:0] pins? If so, how can I let 928 locked with these signals absenting?
- If the pattern I used for 925 ok or not?
- What is the lock mechanism between Deserializers and Serializers? That is to say, what is the condition of locking?
- If there are error configurations if ds90ub925?