DS250DF410: PRBS generator setting

Takumi Suzuki1

Mastermind 8420 points

Part Number: DS250DF410

I would like to ask you some questions as below.

Though my customer has been trying to use PRBS function, they have failed to get output PN pattern signal yet.

They set the register setting by "SNLU182B 6.22".

Q1) About the output bit rate of PRBS pattern, the rate is fixed to the specific rate?

Q2) The setting sequence of the customer is following. Is this correct?

add data

---------------

2Eh 04h

30h 01h

1Eh 10h

79h 00h

79h 20h

30h 00h

30h 08h

1Eh 80h

09h 20h

Thank you for your support.

Best Regards,

over 2 years ago

0 Rodrigo Natal over 2 years ago

TI__Mastermind 19135 points

Please confirm that there is a valid input signal to the retimer channel in quetion and that its CDR is locked.

Regards,

Rodrigo Natal

0 Takumi Suzuki1 over 2 years ago in reply to Rodrigo Natal

Mastermind 8420 points

Hi Rodrigo-san,

Thank you for your reply.

Let me confirm.

By the way, about my 2 questions, will you give me your comment?

Best Regards,

Takumi

0 Takumi Suzuki1 over 2 years ago in reply to Rodrigo Natal

Mastermind 8420 points

Rodrigo-san,

I confirmed the customer about input signal.

The customer does not use input signal, that is to say, there is no input signal.

One basic question as below, please.

About PRBS function, this is not available in case there is no input signal, correct?

(= It is mandatory to prepare a "reference signal" as an input signal to use PRBS function ??)

Thanks and Best Regards,

Takumi

0 Rodrigo Natal over 2 years ago in reply to Takumi Suzuki1

TI__Mastermind 19135 points

You are right, the customer needs to provide a reference input signal for the CDR to lock to; you cannot generate PRBS if CDR is not locked. This reference input signal may be a 1010 clock signal at a sub-rate of the CDR rate programmed via channel register 0x2F.

See below for the questions.

Q1) About the output bit rate of PRBS pattern, the rate is fixed to the specific rate?

That is correct. However, the customer has the option to force a specific divider ratio via channel register 0x18 after enabling div_Sel override on channel register 0x09

Q2) The setting sequence of the customer is following. Is this correct?

Looks correct.

0 Takumi Suzuki1 over 2 years ago in reply to Rodrigo Natal

Mastermind 8420 points

Hi Rodrigo-san,

Thank you for your answer !

But let me know the meaning of "1010 clock signal" ?

What is the signal meaning?

Thanks and Best Regards,

Takumi

+1 Rodrigo Natal over 2 years ago in reply to Takumi Suzuki1

TI__Mastermind 19135 points

1010 means you have alternating 1's and 0's logic levels. The digital version of a sine wave.

Thanks,

Rodrigo

0 Takumi Suzuki1 over 2 years ago in reply to Rodrigo Natal

Mastermind 8420 points

Rodrigo-san,

Thank you very much !

I understood.

Best Regards,

Takumi

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DS250DF410: PRBS generator setting