DS110DF111: REFCLK voltage level conditions

Hi Rodrigo,

Thanks for your reply.

The REF_CLK specification table you shared doesn't have a maximum value for REFVIH.

The customer wants to know if the DS110DF111 has a problem with the reference clock level supplied through the CDCLV1104.

Could you please suggest a suitable solution?

Thanks a lot.

JH

Hi Rodrigo,

My customer cannot find the above tables you shared in the DS110DF111 datasheet.

Could you please provide a document that the customer can use as a reference for the REFCLK_IN specs of the DS110DF111?

Regards,

JH

Hi Rodrigo,

My customer has additional questions.

Refer to the DS110DF111EVM User's Guide below, the EVM also uses 3.3V as OSC power.

https://www.ti.com/lit/pdf/snlu142

Is there a problem with the customer's REFCLK input circuit for the DS110DF111?
Do they need to adjust the above voltage level input to REFCLK?

Regards,

JH