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DS110DF111: REFCLK voltage level conditions

Part Number: DS110DF111


My customer is using CDCLV1104 clock buffer for the 25MHz reference clock input of the DS110DF111 as shown below.


The captured image of REFCLK_IN at this time is as follows.

They didn't find the input voltage level conditions of the REFCLK_IN pin in the datasheet.

Would the above clock input level be a problem for the DS110DF111?

Do they have to adjust the DS110DF111's REFCLK input level using the method below?

Thank you.