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SN65DP149: SDA, SCL and HPD SRC/SNK pins floating?

Part Number: SN65DP149


Working with the SN65DP149RSBT HDMI Re-Driver/Re-Timer which is connected to a FPGA.


We currently have the DDC connections directly through to the FPGA rather than passing through the chip. Is there is any consequence of leaving the SDA, SCL and HPD SRC/SNK pins floating?


From the datasheet, the HPD controls the power down command, but this can be disabled via register 0x09 bit 2 (pg. 33).  Does the chip require the DDC/HPD to run through it in order for it operate properly or are you able to pass through video without any I2C running through the device.


  • Hi Matt,

    When running the DDC in snoop mode for the DP149 device, we recommend adding pulldowns to the SDA/SCL SRC pins to prevent any unexpected signaling.  Even if you are not using the DDC snoop function, that is probably a good recommendation.  DDC is not required for the DP149 device (it is required for the DP159).

    HPD is required for proper DP149 operation, but you can connect the DP149 just to snoop the HPD line instead of passing it through:

    The bit in register 09h controls whether the DP149 enters power down mode based on HPD but regardless of setting, the device requires a HPD connection.

    I2C control is not required for the DP149.