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DS160PT801: L1.1 power state is not passed through the retimer, but forced on the downstream port

john maroney
Prodigy 10 points
Part Number: DS160PT801

Case Number:  CS1069287

 

Short Description:  L1.1 power state is not passed through the retimer, but forced on the downstream port

For the DS160PT801 GEN4 retimer. Can I deassert clkrreq on the downstream port to put it into a L1.1 link state without having the host set L1.1 on the upstream port. Meaning, the L1.1 power state is not passed through the retimer, but forced on the downstream port.

  • 0
    TI__Mastermind 18725 points

    Hi John,

    The L1.1 state on the retimer is defined by the PCI specification, which states that the retimer only enters L1.1 when CLKREQ# is sampled as deasserted.

    When CLREQ# de-asserted high, the retimer enters L1.1 state. When asserted low, the retimer exits L1.1 state. If a workaround is required, the CLKREQ# state can be overridden using I2C.  Note that the retimer doesn't support 100MHz REFCLK removal while in L1.1.

    In the case you described, the retimer would likely detect an EIOS from the downstream port and be in L1 state until the endpoint exits L1.1.

    Regards,

    Nicholaus

  • 0 in reply to Nicholaus_Malone
    TI__Mastermind 18725 points

    Hi John,

    If this answers your question please mark as resolved.

    Thanks,

    Nicholaus