We meet flicker issue when using 925-926, and see lock lost when flicking. We'd like to check the jitter at 925 PCLK input side.
Here comes some questions:
1. Jitter tolerance:
1) In datasheet, minimum tolerance is 0.4UI, but no max jitter requirement. Is it jitter tolerance (jitter < max jitter tolerance) or eye opening (eye opening > min eye opening)?
2) If PCLK is 30MHz, 0.4UI is 0.4*1/30M = 13.3ns, right? I asked because in datasheet, the note says 1UI = 1 / (35*PCLK)
2. Test method:
In TI CTP document, it's based on DPOJET jitter analysis software, is there any guideline to use Infinite mode to measure jitter? Should we read the jitter of 3rd clock cycle?