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DS100KR800: Bypass mode?

Shawn_Wang
Expert 3811 points
Part Number: DS100KR800

Hi team

My customer is using DS100KR800 for FPGA SERDES port between two boards and they want to know if DS100KR800 is supporting Bypass mode? 

(FPGA SERDES -> DS100KR800#1) -> 2m 10G cable ->  (DS100KR800#2 -> FPGA SERDES)

The customer found the eye diagram is better if DS100KR800 EQ and PE both are configured to 0dB and any adjustment of EQ and PE made the quality of eye diagram worse, but the quality of eye diagram is not so good even under 0dB configuration. Hence the customer wants to know:

  1. If DS100KR800 is supporting bypass mode? The customer wants to double check if DS100KR800 is necessary for their application.
  2. When EQ and PE both are configured to 0dB, is is okay to see DS100KR800 is in bypass mode? What processing is performed on the signal in this mode?
  3. Considering there is only a 2m cable between two boards, hence if the loss between two DS100KR800 is small, will using DS100KR800 cause the signal quality to deteriorate?
  • 0
    TI__Mastermind 22102 points

    Hi,

    Is there any significant insertion loss between the FPGA SERDES and DS100KR800?  Also, do you know the approximate insertion loss of the cable at the nyquist frequency of the data rate?

    1) There is not a bypass mode on the DS100KR800.  The closest to this would be setting the EQ and de-emphasis to 0.

    2) There is still some residual equalization applied to the signal even when the EQ and de-emphasis are set to 0.  Please see the table below.

    3) It would be helpful to know the insertion loss of the cable to better answer this.   However, there are a couple of other considerations that might negatively impact performance.

    • Cascading redrivers adds additional jitter to the signal chain since the redriver does not have any CDR mechanism.
    • It's possible that if there is not significant insertion loss between SERDES 1 and DS100KR800#1, the signal might get over equalized in the CTLE stage of the device and run into linearity limitations of the output driver.

    Do you have any eye diagrams or data to share?  What control does the customer have through the transmit settings of the SERDES device?

    Thanks,
    Drew