DP83825I: Power up sequence

Hi Oba,

You can assume T2 has a minimum of 0ms. The requirement is that VDDIO must be fully ramped before VDDA3V3 starts. 

This is not taken care of on the EVM, which may still work fine, but not ensure the most robustness over time. Please follow the above recommendation for your use case. 

Thanks,

David

Hello David,

Thanks for your reply.

OK, I understand that a load switch or somthing must be put on VDDA3V3 rail.
The figure 1 on the datasheet must be like the below (I added a red line to make clear that the start point of "T2" is hte end point of "T1").
Do you agree with it?

I have an additional question for not DP83825, but DP83826.
According to DP83826 datasheet, it seems that VDDA3V3 and 3.3V VDDIO can be simply tied. Is this understanding correct?
Is the power design different between DP83825 and DP83826?

Regards,
Oba

Hi Oba,

I agree with the red line in your image, yes. 

I will get back to you about your 826 question later this week.

Thanks,

David

Hi Oba, 

The supply sequencing requirement was fixed on the DP83826, so it is different than the DP83825, yes.

Thanks,

David 

Hello David,

Thanks for your reply. 
So VDDA3V3 and 3.3V VDDIO can be simply tied in DP83826. Correct?

Regards,
Oba