DP83640: CLK_OUT source selection

Matthew Howard

Prodigy 20 points

Part Number: DP83640

The datasheet for the DP83640 mentions the CLK_OUT pin can be configured to pass-through the 50MHz clock from X1.

Please see the image attached.

This is shown as source 4 in the image.

However I can not figure out how this is configured on the PHY as there does not seem to be any other mention of it.

If anyone could point me in the correct direction that would be much appreciated.

Thanks,

Matt

over 1 year ago

0 Gerome Cacho over 1 year ago

TI__Mastermind 27885 points

Hi Matt,

This is an older part with limited support. However, from looking at other threads we might be able to find a setting that works. Please try clearing bit 15 (PTP_CLKOUT_EN) in register 0x14 (PTP_COC).

Sincerely,

Gerome

0 Matthew Howard over 1 year ago in reply to Gerome Cacho

Prodigy 20 points

I never managed to get the CLK_OUT function to work or pass through any 50 MHz signal.

But it looks like I am having the same issue as this customer:

https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1099279/dp83848q-q1-output-at-clk_out-is-missing-when-in-rmii-mode-sometimes?tisearch=e2e-sitesearch&keymatch=CLK_OUT%252050MHz#

Will have to modify the PCB to provide the REFCLK directly to the microcontroller.

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DP83640: CLK_OUT source selection