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PCA9306: Question about functionality

Part Number: PCA9306
Other Parts Discussed in Thread: TXS0102, LSF0102, TCA9406

Hi Team,

I have a few questions about this device. 

1. VCC1=1.2V or 1.8V and VCC2 = 3.3V.  VCC1 will rise later than VCC2. What will be the behavior of  SCL2 and SDA2 during this time? Will they be High -Z ? Will they Interfere with other communications running on  I2C bus  (The Bus SCL2 -SDA2 Connected to)? Reference schematic below.

2. the same condition as above, and want to disable the SCL2/SDA2 connection using the DISABLE_I2C_CONNECTION. Will there be any problem since it will violate VREF2> VREF1 constraint given in the Datasheet when DISABLE_I2C_CONNECTION  is HIGH? What will be the behavior of  SCL2 and SDA2 during the time DISABLE_I2C_CONNECTION  is HIGH  assuming VCC1 is available during this period? Will they be High -Z ? Will they Interfere with other communications running on  I2C bus  (The Bus SCL2 -SDA2 Connected to)?

3. What is the difference between PCA9306 and  TXS0102 devices? Is there a constraint for using LSF0102 instead of TXS0102 for I2C and PMBus? Both devices has auto direction sensing is there a constraint on maksimim- minimum external resistance to GND/VCC for those devices?

Regards,

Marvin

  • 1. During normal operation, a current flows into VREF2 and out of VREF1. This current might partially power up VCC1 and any devices connected to it. This is usually not what you want.

    2. When EN is low, all the other pins are high impedance, and their connections do not matter.

    3. The PCA9306 and the LSF0102 are identical. The TCA9406 and the TXS0102 are identical. The TXS has internal pull-up resistors, edge accelerators, and properly handles a powered-off supply.

  • Marvin,

    TI will respond by noon CST 10/11/2022.

    Regards,

    Tyler

  • Hi Marvin,

    1. VCC1=1.2V or 1.8V and VCC2 = 3.3V.  VCC1 will rise later than VCC2. What will be the behavior of  SCL2 and SDA2 during this time? Will they be High -Z ? Will they Interfere with other communications running on  I2C bus  (The Bus SCL2 -SDA2 Connected to)? Reference schematic below.

    If VCC1 will rise later than VCC2, then you can expect what Clemens was stating where current will flow from VREF2 through the pass FET out of VREF1. Because your circuit implements the recommended 200kohm resistor, we can expect this current to be limited to protect the internal switch from sourcing too much current. 

    As for the SCL2 and SDA2 lines, if VCC1 = GND when VCC2 = 3.3V, then the pass FET between VREF1 and VREF2 would be ON sourcing current out of VREF1 which would drop the EN pin voltage towards VCC1 = VREF1 = GND. This means that the PCA9306 should be High-Z, isolating both sides of the SDA and SCL lines. 

    2. the same condition as above, and want to disable the SCL2/SDA2 connection using the DISABLE_I2C_CONNECTION. Will there be any problem since it will violate VREF2> VREF1 constraint given in the Datasheet when DISABLE_I2C_CONNECTION  is HIGH? What will be the behavior of  SCL2 and SDA2 during the time DISABLE_I2C_CONNECTION  is HIGH  assuming VCC1 is available during this period? Will they be High -Z ? Will they Interfere with other communications running on  I2C bus  (The Bus SCL2 -SDA2 Connected to)?

    As long as the 200kohm resistor is implemented, I do not see any harm in this application. If there was no 200kohm current limiting resistor, then I would expect devices to be damaged since there would be almost a direct short of 3.3V to GND. 

    Since the DISABLE_I2C_CONNECTION will pull EN to GND, then the internal switches of the PCA9306 will be HIGH-Z separating both sides of the I2C bus. 

    3. What is the difference between PCA9306 and  TXS0102 devices? Is there a constraint for using LSF0102 instead of TXS0102 for I2C and PMBus? Both devices has auto direction sensing is there a constraint on maksimim- minimum external resistance to GND/VCC for those devices?

    Regards,

    See Clemens' statement for point 3. 

    Regards,

    Tyler