Now I'm designing PCIe Retimer Board with DS160PT801, so I need to understand REFCLK architecture of DS160PT801 for our retimer board and system.
I want to use two retimer because of long length between RC and EP.
So, I'm wondering if I need to use clock buffer IC on the RC board to share REFCLK from RC to EP.
If you look at page 33 of DS160PT801, there are REFCLK Architecture.
1. Figure 8-9.(Non-Common REFCLK Architectures Not Supported) are definite regardless of the unfinished validation?
2. If I want to use two retimer, how can I design architecture like Figure 8-8(Non-Common REFCLK Architecture)?
Should I use clock buffer IC to share RC's REFCLK to EP?