There are four different types of resets available on a TI Ethernet PHY, each with it's own use case.
Pin Reset:
Activated by asserting the Reset pin low. Digital core is reset, link up process will restart. All internal registers will reinitialize to their default value. All bootstrap pins will be resampled.
Hard Reset:
Activated by writing 0x8000 to register 0x1F. Digital core is reset, link up process will restart. All internal registers will reinitialize to their default value. Bootstrap pins will NOT be resampled.
Soft Reset:
Activated by writing 0x4000 to register 0x1F. Digital core is reset, link up process will restart. All internal registers will NOT reinitialize to their default value. Bootstrap pins will NOT be resampled.
MII Reset:
Activated by writing 0x8000 to register 0x0. Digital core is reset, link up process will restart. Only registers 0x0-0xF will reinitialize to their default value. Bootstrap pins will NOT be resampled.
Here is a summary table:
Digital core reset | Registers reset to default | Bootstraps resampled | ||
0x0-0xF | 0x10-0xFFFF | |||
Pin Reset | Yes | Yes | Yes | Yes |
Hard Reset | Yes | Yes | Yes | No |
MII Reset | Yes | Yes | No | No |
Soft Reset | Yes | No | No | No |