Hello Expert:
we have customer design in DP83848Q-Q1 Ethernet PHY transceiver 100-Base-TX design from Automotive Gateway communication with OBD application.
currently MAC Layer cannot read DP83848Q-Q1 address . (MDIO cannot access) , I'm debugging with customers found Latch-in of Hardware Configuration Pins PHYAD0 pin still always Low after MDC power up
customer is design NXP S32G SoC connect with DP83848Q-Q1 , the Layout trace of MII interface is ~3cm not too long. I attached customer schematic and HW power up test result . can you give debugging guideline help us further debugging process?
thank you very much
