Hi Team,
I am using DP83826ERHBR ethernet PHY in one of our design.
I wish to know power supply sequencing of the IC since the datasheet mentioned some ramp up delay (5-50mSec) for VDDIO.
power supply generation in my board: 5-3.3V LDO(PN: AZ1117IH-3.3TRG1) to generate 3.3V and from this output using a ferrite bead to generate VDDIO.
Is any time delay circuit or load switch is required to keep 5-50mSec for VDDIO generation or I can use the output of LDO directly.
