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DP83867CR: Link fail and register setting

Part Number: DP83867CR

Hello Expert,

Could you please review schematic and check issue?

After powering on the DP83867CR, does the link work normally even in the default state without register setting?

Or do I have to do the register setting unconditionally?

If so, please let me know the register and value that should be set.

The attached file is the waveform from TD_X Port, and the link LED is off.

Best regards,

MIchael

  • Hello Expert,

    I added strap pin information as below.

    Best regards,

    Michael

  • Hi Michael,

    I can assist on this. However, please note, TI US is closed until 1/3/23. I can get eyes on this from my team for discussion starting tomorrow.

    Sincerely,

    Gerome

  • Hi Michael,

    The Ethernet team is working to make our schematic review checklists available to the public. Currently DP83867's checklist is available on the product folder under Design Tools and Simulation. Please have a look at it there. 

    The PHY, assuming everything hardware-wise has been taken care of appropriately, should link up without extra register configuration needed. 

    I would advise checking for PHY operationality as baseline (see if CLK_OUT is toggling if not disabled, link pulses are being sent on MDI line, power pins and control pins such as reset_n are where they need to be). If everything is established there, then we can move our focus on auxiliary components like the magnetics, as well as the layout.

    Sincerely,

    Gerome