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DS90UB954-Q1: About SSCG for I2C Clock

Part Number: DS90UB954-Q1

Hi Teams,

I2C is used for register setting and back-channel of the 954.
The SoC connected to the 954 has the SSCG setting enabled for the internal PLL.
Therefore, it appears that the I2C clock is also SSCG enabled.

Is it OK to input SSCG to the I2C block of the 954?
The SSCG settings to be input are as follows.
 1.Down spread
 2.Modulation 3%.
 3.Modulation frequency 4.03kHz

What is the allowable range of SSCG, if any?

Best Regards,

Masanori

  • Hi Masanori,

    Are you trying to apply spread spectrum clocking to the 954? To apply SSC, you must use the serializer in synchronous mode and apply a spread spectrum REFCLK to the 954. You do not need to enable SSCG on your SOC since the 954 uses the REFCLK pin for SSC. Section 7.4.4 in the 954 datasheet has a REFCLK oscillator specification table that lists the allowable range of the SSC parameters. For down spread, the SSC modulation percentage range is -1% to 0%.

    Regards,
    Cindy

  • Hi Cyndy,

    Thank you for your response.
    No, it is not.
    I am using a crystal oscillator (25MHz) for the 954.
    Since the SoC's internal PLL is SSCG enabled, the I2C clock is also SSCG.
    I would like to know if the 954 is acceptable for the I2C clock being SSCG.
    If so, what is the acceptable range?

    In general, I think SSCG is considered as jitter in digital circuits.
    Is there any problem with jitter? I think this is the case.

    Regards,
    Masanori

  • Hi Masanori,

    I see, so you are concerned with the I2C clock coming from the SOC. There are specifications for the I2C timing (including limits for the I2C clock frequency) in the 954 datasheet. Please refer to Section 6.8 Recommended Timing for the Serial Control BusI recommend that you measure the I2C timing coming from the SOC and to ensure that the transactions meet all of the datasheet specifications.

    Regards,

    Cindy

  • Hi Cindy,

    Sorry for the late reply.
    Thank you for your response.
    I understand and will close the case.

    Regards,

    Masanori

  • Hi Cindy,

    I have closed it, but I would like to ask an additional question.

    We run the I2C clock that the SoC sends at 400 kHz.
    However, the output clock from the SoC is slightly above 400kHz when variations are taken into account.

    For example, if the output clock from the SoC is 400.1 kHz, then Fast mode electrical characteristics are max 400kHz, so it will be over.
         400.1kHz < spec max 400kHz = NG

    If I try to meet the electrical characteristics, do I need to change the register to fast-plus mode?

    Regards,

    Masanori

  • Hi Masanori,

    Correct, that would be over spec for fast mode. The 954 supports fast-mode plus (>0MHz  to 1Mhz clock frequency), so this mode is recommended if you are going over 400kHz. You can refer to table 7-17 in the datasheet for the I2C mode register settings. 

    Regards,

    Cindy

  • Hi Cindy,

    Thank you for your response.

    Please tell me one more thing.
    I would like to know about local I2C for register setting and back channel I2C.

    Are 0x0A and 0x0B in the DS90UB54 registers the local I2C speed settings?
    Is it the speed setting for back channel I2C?

    I am planning to use local I2C at 100 kHz.
    I plan to use the back-channel I2C at 400 kHz.
    Please let me know about register settings and other design considerations.

    Regards,

    Masanori

  • Hi Masanori,

    I will have to look into this and will get back to you by Friday 2/17. 

    Regards,

    Cindy

  • Hi Masanori,

    Are 0x0A and 0x0B in the DS90UB54 registers the local I2C speed settings?

    If the 954 is acting as a proxy controller, then registers 0x0A and 0x0B configure the I2C speed for transactions occurring through the bidirectional control channel. For example, if an I2C transaction is coming from the Host -> SER -> DES -> Remote Device, then the DES will regenerate the read or write access it received from the SER using the timing configuration in registers 0x0A and 0x0B.

    If you have the SER as the proxy controller (for example, sending a command from Host -> DES -> SER -> Remote Device, then you would configure the SCL high and low time in the serializer registers. 

    I am planning to use local I2C at 100 kHz.
    I plan to use the back-channel I2C at 400 kHz.
    Please let me know about register settings and other design considerations.

    Local I2C refers to the I2C connection between the HOST controller and the DES/SER. If this is what you mean, then no additional configuration is needed. If a host controller wants to access the 954 (the target device), then the 954 will automatically accept whatever clock speed the controller chooses to use (<1MHz). 

    Can you clarify what you mean by back-channel I2C? Do you mean the proxy controller I2C speed for transactions occurring through the bidirectional control channel? If so, this is configurable via the SCL high time and SCL low time registers as I described above. 

    Regards,

    Cindy

  • Hi Cindy,

    Thanks for the detailed answer.

    Answer to this question.
     -> Can you clarify what you mean by back-channel I2C?

    We use I2C to read/write registers from SoC-A to SoC-B in the path SoC-A -> DES -> SER -> SoC-B.
    I called it back-channel I2C because it is DES -> SER.
    In this case, is it correct to understand that SER is the proxy controller?
    I do not understand proxy controller.
    Is it synonymous with I2C master?
    Since SoC-A is the sending side, I understand that SoC-A is the master.
    Am I understanding it wrong?

    Regards,

    Masanori

  • Hi Masanori, 

    Yes, in that case the SER is the proxy controller (updated term for proxy master). This means that it is acting as an I2C master on behalf of the I2C host controller because it regenerates the SCL signal sent across the link from the DES. The SoC is still the true master. 

    You can read more details in this app note. Essentially, the SER and DES can function as an I2C slave proxy or master proxy depending on which side of the serial link the I2C Host controller (SoC) is present.

    • While addressing a remote peripheral or SER/DES, the slave proxy (device connected to the Host I2C
      bus) will forward any transactions sent by the Host controller to the target device.
    • The other device (SER or DES connected to the remote I2C bus) will function as a proxy master device. It acts as a master on behalf of the I2C host controller and gets the SCL timing from registers. 

    The SER/DES interface acts as a virtual bridge between host controller and the remote devices. 

    I hope this clears things up.

    Regards,

    Cindy