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DP83TC814R-Q1: Question for recommended 3-Level starp resistor value

Kazuki Kuramochi
Genius 9260 points
Part Number: DP83TC814R-Q1

Hello Expert,

I have questions of Datasheet's Table 8-15. Recommended 3-Level Strap Resistor Ratios for PHY address.

At first, I supposed that  this table show pull-up resistor value's recommendation based on as ratio of internal-pull down resistor as like as 5.8k * 13, 5.8k * 4.
This is because, Table 8-16's name is Recommended 2-Level Strap "" Resistor.

However, if I followed above understanding pin voltage will exceed datasheet's voltage requirement for each mode.(e.g. mode2@3.3V=0.726~1.386V but internal pull-down * 13 and internal pull-down / 13 will exceed the requirement.)

So I calculate pin voltage as Table 8-15 as recommendation of resistor "value" but it seem that don't have enough margin against datasheet's voltage requirement for each mode.(e.g. mode3@3.3V=1.518~3.3V but it will be 1.86V(3.3V * 5.8 / (4.5 + 5.8)))

Therefore, would you tell me your recommendation for pull-up resistor for 3-Level Strap pin as "actual number"?

Thank you and best regards,
Kazuki Kuramochi

  • 0
    TI__Expert 8650 points

    Kazuki-san,

    Are you seeing any issue in your application with the recommended resistor values in the datasheet ?

    Some pins are 3-level strap compatible, where as other pins are 2-level compatible.

    We have used the similar strapping on our EVMs and haven't seen any issue.

    Please share your feedback if any issues are noticed in the application with strapping.

    Thanks,
    Rahul

  • 0 in reply to Rahul
    TI__Genius 9260 points

    Rahul-san,

    I just want to confirm about the recommended "value" for Pull-up resistor.

    As I asked, Does Table 8-15 show recommended "ratio" or "value"?

     

    Also, our customer's considered SoC required don't input the votage level from 0.6V ~ 2V @VDDIO=3.3V case.
    In this case, if our recommendation is 4.5kohm, voltage range on 3-Level strap pin will be from 1.61V to 2.1V.
    So, they can only use Mode1 for 3-level Strap pin.
    Then, is there possibility to relax Pull-up resistor requirement from 4.5kohm+-10%?

    Thank you and best regards,
    Kazuki Kuramochi

  • 0 in reply to Kazuki Kuramochi
    TI__Expert 8650 points

    Kazuki-san,

    Can you please share the details where ratio is mentioned? 

    I can see in the headers of the table that the values are mentioned in KOhms.

    Regards,
    Rahul

  • 0 in reply to Rahul
    TI__Genius 9260 points

    Rahul-san,

    As you can sheet, Table8-15's title has "Ratio" but Table8-16's title don't have "Ratio" as you can see below.

    Title and header is not matched.
    Therefore, I'm request me to tell recommended resistor "value" for 3 level.

    Also, would you tell me whether we can use resistor which is out side of above recommendation(however, which can satisfy voltage requirement for voltage level).

    Thank you and best regards,
    Kazuki Kuramochi

  • +1 in reply to Kazuki Kuramochi
    TI__Expert 8650 points

    Kazuki-san,

    Thank you for the clarification.

    Apologies for the confusion caused, the values mentioned in the tables are the resistor values.

    For mode 3, I would recommend customer to use:

    If voltage requirements are met it should also work, but I would recommend customer to test it out if using different resistor values. We haven't performed any such tests on our end.

    Regards,
    Rahul

  • 0 in reply to Rahul
    TI__Genius 9260 points

    Hi Rahul,

    Sorry for rate reply.

    I understand that bootstrap function will be work correctly even if PU resistor value is out of recommendation but they need to confirm correct "communication" between MAC and PHY by customer.

    I have additional request and will contact you by offline/

    Best regards,
    Kazuki Kuramochi