This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83822I: DP83822: register description 0x457 required

Part Number: DP83822I

Hello,

in Datasheet the RGMII TX latency for 100BaseTX is 170 ns in case "With FAST_RXDV enabled. Register<0x0009>=0x0002. and Register<0x0457>=0x0410".

Unfortunately register 0x457 is not covered by register description. Our investigations seem to show that you only may set 0x457 to 0x410 in case of MAC and PHY are sourced from the same clock source. If we use different clock sources for MAC and PHY we get communication problems.

Can you confirm that register 0x457 may only be set to value 0x410 in case MAC and PHY are sourced by the same clock?

Can you provide register description for register 0x457?

Many thanks,

Alex