DS90UB953A-Q1: DS90UB953A-Q1:

Hi Shmuel,

The 960 should be able to receive data from the 953 with the correct horizontal bytes and number of lines. There are a few registers that can help you configure which CSI port you want to use, how many lanes, etc for the output from the 960. I have provided a list below along with their default values.

CSI_PORT_SEL (0x32): This register controls which CSI port is being used to read/write. The default is set to disable both ports. For writing to port 0 the value should be 0x01, for writing to port 1 the value should be 0x02, and for writing to both the ports, the value should be 0x03.

CSI_CTL (0x33): This register controls CSI skew calibration, number of lanes, clocking mode, and enabling the CSI output. The default is set to disable skew calibration, 4 lanes, non-continuous clocking mode, and disabling CSI output. More information about this register, and how to customize it can be found in section 7.6.3.1 of the 960 datasheet, page 94/95.

FWD_CTL1 (0x20) and FWD_CTL2 (0x21): These registers can be used to configure the forwarding of the data from a specific RX port to the desired CSI port, as well as configuring setting for different types of forwarding, replication, etc. More information on how to customize these registers can be found in section 7.6.1.33 of the 960 datasheet, page 88/89.

Regards,

Vivaan