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DP83TC814R-Q1: DP83TC814 MAC impedance value

Part Number: DP83TC814R-Q1

Hi TI team, 

Please clarify the MAC impedance value steps (Is it 1 ohm)  for  RX and the default value (is it 35 ohm).

9-5 mac_rx_impedance_ctrl R/W 0b RX MAC interface PAD impedance contro;

How about TX

4-0 mac_tx_impedance_ctrl R/W 0b TX MAC interface PAD impedance control

Regards,

Sreenivasa

  • Hi Sreenivasa,

    0x456 bits [5] and [0] control the impedance of the RX and TX MAC interface pads, respectively, which impacts the slew rate. For these bits, value 0 is fast mode, and 1 is slow mode.

    These are the only two options, and bits[9:6] and [4:1] have no effect. Bit[0] is only important when using MII mode, as the TX_CLK is an output from the PHY.

    Thank you,

    Evan

  • Hello Evan, 

    Thank you.

    Is the above table not valid.

    0x456 bits [5] and [0] control the impedance of the RX and TX MAC interface pads, respectively, which impacts the slew rate. For these bits, value 0 is fast mode, and 1 is slow mode.

    These are the only two options, and bits[9:6] and [4:1] have no effect. Bit[0] is only important when using MII mode, as the TX_CLK is an output from the PHY.

    Could you please point me to the above description in the data sheet.

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    The noted table is valid - the DC resistance of the MAC termination is 48Ohms +/- 25%.

    Register 0x456 bits [5] and [0] tunes the IO slew rate without affecting this DC resistance.

    This description is not currently in the datasheet.

    Thank you,

    Evan

  • Hello Evan, 

    Thank you for the inputs.

    Regards,

    Sreenivasa