Other Parts Discussed in Thread: TMDS1204, TDP1204
I recently purchased an TMDS1204EVM, and looking at the schematics in the User Guide, it seems the lanes are both swapped on the RX and TX connectors.
This resulted in the fan-out buffer path outputting the lane2 data instead of the TMDS clock in 1.4/2.0 mode. Can you confirm that this is an known issue and is there any work arounds? Our current development depends on the correct functionality on the fan-out buffer path. Thank you!