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TCA39306: About EN control circuit

Part Number: TCA39306


I have a question.

When EN is turned on in the circuit shown above, the level of SCL1 and SDA1 goes from 1.2V to approximately 2.2V.

When connected as shown in Figure 8-6 and controlling VCC2, the SCL1 and SDA1 levels remained at 1.2V.

Does EN have to be connected as shown in Figure 8-6?

Best Regards.

  • The bias voltage at the EN pin controls the clamping voltage when translating down, so it must be part of the Vref1/2 biasing circuit.

    To disable the device, you must indeed disable VCC2, or pull EN low with an open-drain or open-collector driver; see Using the Enable Pin with the LSF Family.

  • Matsuoka-san,

    As Clemens mentioned, EN pin sets the gate bias of the internal passFET separating side 1 from side 2. 

    If the gate voltage = 3.3V while the drain/source connection is set to VCC1 = 1.2V, there will always be a Vgs > Vth present meaning that the internal passFET is ON which is creating a voltage divider between VCC2 and VCC1. This is why SCL1 and SD1 float up to 2.2V. 

    My recommendation is to tie the EN pin to either VCC1, or a voltage <1.8V. 

    The first figure is for switching mode - but this would require that VCC1 = VCC2. 

    The second figure 8-6 is translation mode, this configuration is correct. The VREF2 and EN connection will properly set the bias of the EN pin voltage to approx. 1.2V + 0.6V = 1.8V, roughly a diode drop above VCC1. 



  • I understand.
    Thank you for your reply.

  • Matsuoka-san,

    Thank you for your question. I will close the thread now.