This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCAN4550-Q1: TCAN4550-Q1

Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

Hi TI Team,

In our device, we are using 2# TCAN4550RGYRQ1 IC for CAN communication,

Normally we do not face any issues with communication. 

After waking up we are not receiving CAN data from the second CAN No issue was observed in the first CAN 

So please let us know anything we need to change in the device tree  ,

Below is the device tree configurations made 
&lpspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi2>;
fsl,spi-num-chipselects = <1>;
spi-max-frequency = <40000000>;
cs-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_HIGH>;
status = "okay";

tcan4x5x0: tcan4x5x@0 {
compatible = "ti,tcan4x5x";
reg = <0>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <5000000>;
bosch,mram-cfg = <0x0 3 2 32 10 1 32 7>;
clocks = <&hclk>, <&cclk>;
clock-names = "hclk", "cclk";
interrupt-parent = <&lsio_gpio3>;
interrupts = <12 GPIO_ACTIVE_HIGH>;
data-ready-gpios = <&lsio_gpio3 12 GPIO_ACTIVE_HIGH>;
reset-gpios= <&exp2 12 GPIO_ACTIVE_HIGH>;
iw-tcan-prop;
wakeup-source;
status = "okay";

};
};

pinctrl_lpspi2: lpspi2grp {
fsl,pins = <
IMX8DXL_USDHC1_RESET_B_ADMA_SPI2_SCK 0x6000040
IMX8DXL_USDHC1_VSELECT_ADMA_SPI2_SDO 0x6000040
IMX8DXL_USDHC1_WP_ADMA_SPI2_SDI 0x6000040
IMX8DXL_USDHC1_CD_B_LSIO_GPIO4_IO22 0x6000040
IMX8DXL_QSPI0A_DATA3_LSIO_GPIO3_IO12 0xA4000021
>;
};
&lpspi3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi3>;
fsl,spi-num-chipselects = <1>;
spi-max-frequency = <40000000>;
cs-gpios = <&lsio_gpio0 16 GPIO_ACTIVE_HIGH>;
status = "okay";
tcan4x5x1: tcan4x5x@0 {
compatible = "ti,tcan4x5x";
reg = <0>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <5000000>;
bosch,mram-cfg = <0x0 3 2 32 10 1 32 7>; //<0x0 3 2 32 10 0 26 12>; // <0x0 3 2 32 10 1 32 7>
clocks = <&hclk>, <&cclk>;
clock-names = "hclk", "cclk";
interrupt-parent = <&lsio_gpio3>;
interrupts = <18 GPIO_ACTIVE_HIGH>;
data-ready-gpios = <&lsio_gpio3 18 GPIO_ACTIVE_HIGH>;
reset-gpios = <&exp2 11 GPIO_ACTIVE_HIGH>;
iw-tcan-prop;
wakeup-source;
status = "okay";
};
};
pinctrl_lpspi3: lpspi3grp {
fsl,pins = <
IMX8DXL_SPI3_SCK_ADMA_SPI3_SCK 0x6000040 / 0x0600004c /
IMX8DXL_SPI3_SDO_ADMA_SPI3_SDO 0x6000040
IMX8DXL_SPI3_SDI_ADMA_SPI3_SDI 0x6000040
IMX8DXL_SPI3_CS0_LSIO_GPIO0_IO16 0x6000040
IMX8DXL_QSPI0B_DATA0_LSIO_GPIO3_IO18 0xA4000021
IMX8DXL_QSPI0B_DQS_LSIO_GPIO3_IO22 0xA4000021
>;
};



Observed Issue prints
root@imx8dxl-iwg46s:~# candump can4
[2024-01-19 12:14:54] [ 310.255222] tcan4x5x spi3.0 can4: msg lost in rxf0
[2024-01-19 12:14:55] [ 310.952451] tcan4x5x spi3.0 can4: msg lost in rxf0
[2024-01-19 12:14:56] [ 311.504395] tcan4x5x spi3.0 can4: msg lost in rxf0
[2024-01-19 12:14:56] [ 311.971422] tcan4x5x spi3.0 can4: msg lost in rxf0

I hope we will recieve the solution for this issue soon

Thankyou

Regards,
Dhiraj
  • Hello Dhiraj,

    This is a TCAN4550 device support forum and not a Linux support forum, and my expertise is with the TCAN4550 device and not the Linux driver.  But I will try to help

    I didn't see anything obviously wrong with your Device Tree configurations.  I did notice that your "msg lost in rxf0" messages in the Observed Issue prints indicates that your RX FIFOs are likely full and no longer capable of receiving messages if they are configured to Blocking mode.  They could also be configured for Overwrite mode which would cause the oldest unread message in the FIFO to be overwritten with a new message which would cause that older message to be lost.

    Can you explain more about what is going on?  I assume you are somehow waking both TCAN4550 devices through some wake up method and then the processor is re-configuring all of the registers and then trying to send and receive CAN messages.  The issue is that one board is sending messages as expected, but the other board is not sending messages.  Is my understanding correct?

    Is it possible to monitor the various status, interrupt, mode configuration and error counter registers to see what state the device is during the error?

    If possible I would like to know the value of the following registers when the error occurs:

    0x000C - Status

    0x0800 - Mode Configuration

    0x0820 - Device Interrupts

    0x0824 or 0x1050 - MCAN Interrupts

    0x1018 - Control Register

    0x1040 - Error Counter Register

    0x1044 - Protocol Status Register

    0x1098 - New Data 1

    0x10A4 - RX FIFO 0 Status

    0x10B4 - RX FIFO 1 Status

    0x10C4 - TX FIFO/Queue Status

    0x10CC - TX Buffer Request Pending

    0x10D8 - TX Buffer Add Request Transmission Occurred

    Regards,

    Jonathan