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XIO2001: XIO2001 in PCI Express Separate Refclk Architecture

Part Number: XIO2001

Hello,

it seems that the XIO2001 requires a (single-ended) 125 MHz reference clock when used in a PCI Express Separate Refclk Architecture?

Am I getting it right: when the other/remote port device (e.g. a PCI Express Switch) requires a 100 MHz oscillator (or clock source) for PCI Express Separate Refclk Architecture then we just spend a 100 MHz oscillator on the other device REFCLK input and say a 125 MHz 100ppm oscillator on the XIO2001 REFCLK input and the PCI Express Link would work fine?

Thanks

  • If you have a 100 MHz source, you should, if possible, use it and configure the XIO2001 for a 100 MHz differential signal. (In general, PCI clocks are differential.)

    If you really want to use a 125 MHz clock, this is possible. The 125 MHz clock is asynchronous, i.e., it does not need to be synchronized to the 100 MHz clock used by the other device.

  • OK thanks. So it should work with e.g. 100 MHz <=100ppm low jitter oscillator for the other async REFCLK capable device and 125 MHz <=100ppm low jitter oscillator for the XIO2001 REFCLK+ input.

    I was just wondering because the PCI Express specification only refers to 100 MHz REFCLK signals (even for Separate REFCLK Architecture) as it seems.