Hello TI,
While reading a application note SCPA054 in section 2.1.4 it mentions " There is a lower limit to the pullup resistor because if the resistance is too low (meaning pullup current is to strong/high) then the VOL could potentially be higher than the VIL of the input buffer, thus it could not detect logic low properly."
Need more clarification on this as if the V(OL) is higher than V(IL) then ideally it should detect the high voltage.
It seems the sentence is incorrect.
Kindly clarify.
Thank you.
