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P82B96: I/O buffers

John B
Intellectual 255 points
Part Number: P82B96

I am wondering about this IC P82B96. What are the possible applications. There is no logic. The input and the output signals remain the same in timing and I think also in voltage levels. Then what is the purpose of using such devices in electronics designs. 

  • 0
    TI__Mastermind 23721 points

    Hey John,

    The P82B96 can be used to buffer/ translate I2C signals across extended cable lengths with cap loads up to 4000pF (note that with longer cabling used, the max achievable freq. is also decreased). Depending on the VCC being used, both input/ output logic levels (VIT/ VOL) are mentioned in the electrical characteristics table (section 7).

    You may see sections 10.2.1 and 10.2.3 of the datasheet for example use cases.  

    Regards,

    Jack  

  • 0 in reply to Jack Guan
    Intellectual 255 points

    Thanks for your reply. You said that this device can be used to buffer/ translate I2C signals across extended cable lengths with cap loads up to 4000pF. I have three questions.  

    1- Does the I2C signals (clock and data) remain single ended at the output. I mean still two wires, one for clock and one for data, right ? 

    2- Second question is about the voltage levels. Can it is possible to have different voltage levels at input and output ? 

    3- What is the cap loads. Kindly explain bit more that how the higher cap load capability leads to longer cable lengths ? What is the nominal length of cable for I2C and how much extended length of cable we can get using this device ?  

  • 0 in reply to John B
    Guru 272930 points

    1. The I2C signals remain single-ended. However, the P82B96 splits them into unidirectional lines, so you can insert differential transceivers (LVDS, RS-422) or isolators in the middle.

    2. The P82B96 can run with a higher VCC, and with different I/O voltages.

    3. The I2C specification limits the bus capacitance to 400 pF (the capacitance and the pull-up resistors form a low-pass filter). A higher limit would require devices with higher drive strength, such as the P82B96. (What matters is not the length but the capacitance.)

  • 0 in reply to Clemens Ladisch
    Intellectual 255 points

    Thanks for your reply. The questions number 2 and 3 are clear to me. 

    I am still wondering about your statement in response to question 1. "However, the P82B96 splits them into unidirectional lines". Can you please explain bit more. I guess the I2C clock (SCL) is generated by the I2C master and goes to the I2C slave. Hence, the I2C clock (SCL) is unidirectional. But the data is bi-directional. The I2C data (SDA) is bidirectional. How this can be unidirectional by using P82B96 that splits into unidirectional lines ? 

  • 0 in reply to John B
    TI__Mastermind 29333 points

    Hi John,

    Figure 10 does a good job of showing what Clemens is talking about here.

    You can see that on the buffered side "Tx/Ty, Rx/Ry side" there are two uni-directional lines that are tied together. Rx and TX are considered uni-directional because they only drive in one way. In the case of figure 10, communication is strictly over i2c, so the R and T lines are tied together to get back the bi-directional nature of i2c. 

    To CLemens point, if you were to add other protocol transceivers like RS-422/485, CAN, etc. you could because P82B96 splits these two lines. 

    See this application note here 

    Regards,

    Tyler