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DS100MB203: Does MUX support the loopback?What is the insertion loss of MUX?How does EQ work?

Part Number: DS100MB203
  1. Does MUX support the loopback feature and how do I configure it?
  2. What is the insertion loss of MUX?
  3. Can we know how EQ works by *.sh config files?—— is set by an external PIN or an internal register?
    In our schematic, EQ S0/S1 is a pull-down 1k, and EQ D0/D1 is a pull-up 1k,Is it *.sh config files or external pins that determine how MUX works?
  4. According to table2, the Float and R only be configured by pull-up or pull-down resistors,the 0 and 1 only be configured by code,right?

below is schematic\Table2\*.sh config files

DS100MB203_SCH_0417.pdf ds100mb203_setup.zip

   

  • Hi,

    Does MUX support the loopback feature and how do I configure it?

    DS100MB203 does not support an internal loopback feature.

    What is the insertion loss of MUX?

    Insertion loss of DS100MB203 is not characterized. Typically this is not an important measure for our customers because the MB203 compensates for channel insertion loss by applying equalization.

    Can we know how EQ works by *.sh config files?—— is set by an external PIN or an internal register?
    In our schematic, EQ S0/S1 is a pull-down 1k, and EQ D0/D1 is a pull-up 1k,Is it *.sh config files or external pins that determine how MUX works?

    I see in your schematic that the ENSMB pin is pulled high configuring SMBus slave mode. In this mode, EQ is configured by register settings only and EQ_xx pin settings are ignored. I see in your .sh register config file that all channels are configured to the minimum EQ setting (level 1).

    According to table2, the Float and R only be configured by pull-up or pull-down resistors,the 0 and 1 only be configured by code,right?

    0, 1, R, and Float are all hardware pin settings. These can be used on the EQ_xx pins to configure EQ setting when using pin control mode.

    Best,

    Lucas

    1. Does MUX support EQ auto linktraining and how to configure it?
    2. What do these 8 channels mean, and which part of EQ does each channel correspond to?
  • Hi Hanbo,

    Does MUX support EQ auto linktraining and how to configure it?

    MB203 doesn't directly interface with link training, but it can successfully pass through link training signals in 10G-KR or PCIe Gen-3 mode. In these modes, the MB203 signal path becomes linear and transparently allows the host controller and the end point to optimize the full link and negotiate transmit equalizer coefficients. To configure, pull the MODE pin high for 10G-KR mode or float the MODE pin for AUTO PCIe Gen 1/2/3 mode.

    What do these 8 channels mean, and which part of EQ does each channel correspond to?

    These 8 channels represent the default input-to-output mapping of the MB203. Registers which configure RX settings (RXDET, EQ) are configured on the channel which corresponds to the correct receiver input. Registers which configure TX settings (VOD, DEM) are configured on the channel which corresponds to the correct transmitter output. For example, register 0x16 should be used to configure the EQ on S_INB0.

    Best,

    Lucas