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Original question:

SN65LVDS93A-Q1: SPREAD SPECTRUM CLOCKING - PLL limitations and modulation supported

SN65LVDS93A-Q1: Spread spectrum specification for SN65LVDS93A

Kalpesh Diyora
Prodigy 170 points
Part Number: SN65LVDS93A-Q1
Other Parts Discussed in Thread: SN65LVDS94, SN65LVDS93A

Hi TI team,

We are using SN65LVDS94 part in our project. 

This part is capable to support spread spectrum and specification found from datasheet as below which is for input clock.

Above data is for input clock, means, RGB interface CLKIN pin related.

Our query is, Does this bridge pass the same spread spectrum which is present on CLKIN input(RGB input side) to the LVDS output as by default or need enable control for same? No further information found in DS. Please advise on this.

What is maximum resolution this bridge supports? Is it 1920 x 1080 p or lower?

  • 0
    TI__Genius 16175 points

    Hello,

    Kalpesh Diyora said:
    Our query is, Does this bridge pass the same spread spectrum which is present on CLKIN input(RGB input side) to the LVDS output as by default or need enable control for same? No further information found in DS. Please advise on this.

    The SN65LVDS93A has been designed to have high enough PLL bandwidth to pass over spread spectrum clock but also have low enough bandwidth to reject high frequency noise and jitter. This is an automatic feature, so there is not control in this device.

    Kalpesh Diyora said:
    What is maximum resolution this bridge supports? Is it 1920 x 1080 p or lower?

    The SN65LVDS94 supports a PCLK range of 20 MHz to 68 MHz. What are your full video timing parameters?

    Best,

    Nikolas