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Is this board a new design that is currently being tested or was it also tested before? If you have tested multiple of these boards, are they all showing the same behavior?
The receiver has this 100-Ohm differential termination? Was this also measured on board? Also, how was the trace impedance for the LVDS verified?
Is there a continuous ground plane between the layers? Are the trace widths the same throughout? From the image it's not completely clear if they're all the same width, and there could be discontinuity near the vias.
Do all the LVDS pairs have roughly the same ringing waveform (as the image you shared) or are some of them performing better?
Is there also any issue observed with the LCD display?
L1 is reference to L2 GND plane, L10 is reference to Layer 9 Ground plane
1. Are there any split-planes in the layer next to these signals or are they solid ground?
2. Is there any concern or issue you're looking into regarding the LCD connection? Do they have any reference design or layout recommendation for the LVDS traces? Could you tell us what the LCD display TCON or connector is? There seems to be a receptacle on the schematic you sent, what's on the other end? Is there a flex cable or an adapter board to connect them?
For mitigating this issue on the current board it might come down to an impedance mismatch at the frequency you are running the LVDS at. We do not have exact recommendations for this other than meeting the datasheet specifications and following the EVM as a reference, because that comes from validation data.
If you have the flexibility you could try to use a different model for the LCD display, or terminate it externally with the 100-Ohm differential and measure those signals.
Yes we can continue discussing offline. I will message you my email address.
