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DS90UB953A-Q1: Limitaion on DS90UB953 in backwards compatibility mode

Part Number: DS90UB953A-Q1

Tool/software:

Hi,

We have a video card integerted with Des954,Ser953 and a FPGA inside.

The FPAG will copy all CSI data from Des954 to Ser953.

We want connect the video card between a camera with Ser913 and ECU with Des914.

Could it be feasible?

What's the limitation on Ser953 in BCM mode?

Do we need to change the CSI frequency of data copied from Des954?

  • Hello Jone,

    Just for clarity you want to send imager data from the 913 to the 954, then to a processor SoC that will copy that CSI data and send it from the 953 to the 914 and on to the ECU?

    Best,

    Carter Langston

  • Hi Carter,

    Your understanding is correct.

    We can get 954 to recieve data from 913, but got some problem to send data from 953 to 914.

  • Hello Jone,

    The 953 is backwards compatible with the 914 however the device must be placed into DVP mode. This mode can be configured using the Mode Pin on the 953. This link here contains more information on backwards compatibility mode and the necessary configuration.

    Best,

    Carter

  • Hi Carter,

    The CSI-2 rate on TI954 can be configured to 400Mbps per lane in minium.

    If we copy the CSI data from TI954 to TI953 and set TI953 in DVP mode (CLKIN=25MHz RAW10),

    does it mean we can only receive 1 lane from TI954?

  • The minimum data rate for the 1 lane configuration is 500 Mbps so the 400 Mbps will not work as it is too low. The lowest data rate per lane that could be used is the 800 Mbps in the 1-lane configuration. 

  • Hi Carter,

    Since the CSI2 rate on TI954 can be set to 400Mbps or 800Mbps, 

    1) Should the DVP mode switch on TI953 be selected only by hardware? Can we change the mode by writing registers?

    2) Since for TI953 RAW10: CLKIN frequency must be between 25 MHz and 66.5 MHz,

        can we set 1 lane*400Mbps CSI2 rate on TI954 and send it out via TI953(CLIN_IN= 25MHz)? 

    3) Can we set 2 lane*400Mbps or 1lane 800Mbps CSI2 rate on TI954 and send it out via TI953(CLIN_IN=40MHz)?

  • Hi Jone,

    Should the DVP mode switch on TI953 be selected only by hardware? Can we change the mode by writing registers?

    No, the mode can be changed by overridden by writing to registers labeled in section 3.3 of this document

    2) Since for TI953 RAW10: CLKIN frequency must be between 25 MHz and 66.5 MHz,

        can we set 1 lane*400Mbps CSI2 rate on TI954 and send it out via TI953(CLIN_IN= 25MHz)? 

    3) Can we set 2 lane*400Mbps or 1lane 800Mbps CSI2 rate on TI954 and send it out via TI953(CLIN_IN=40MHz)?

     The 1 lane 400 Mbps configuration would not work as 400 Mbps is too slow for the 1 lane configuration. The configurations listed in the second question are both possible.

    Best,

    Carter Langston