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SN65HVD1050: SN65HVD1050DR CANL voltage level over specification

Barton Huang
Prodigy 20 points
Part Number: SN65HVD1050

Tool/software:

Dear Team's,

We have used SN65HVD1050DR for can bus communication in our designs. I check the CANL waveform found that CANL voltage is 2.5V is over specification 1.5V.

Is CANL voltage above 1.5V an issue?

How can I modify the circuit so that the CANL voltage is lower than 1.5V?

Circuit: CN301 is not connected to anything.

Waveform: CH1-CANL, CH2-CAHH, CH3-VREF

SPEC:

 

  • 0
    Guru 287370 points

    According to your measurement, the CANL voltage in the dominant state is 0.923 V.

  • 0 in reply to Clemens Ladisch
    Prodigy 20 points

    Thanks your response, that's my misunderstanding.

    According to your measurement, CANH minimum voltage is 2.2V is over 2V, How could I measure receiver test t_PLH?

  • 0 in reply to Barton Huang
    TI__Guru 72272 points

    Barton,

    The test you've shown is testing the differential threshold interpretation to make sure RXD responded correctly. tPLH is measuring the low to high transition, dominant to recessive, and it showing that once CANH reaches 2V, and knowing CANL is 1.5V, the differential will be 0.5V, which is the threshold for a recessive level on a CAN network. Once the CAN differential is 0.5V, then the amount of time for RXD to reach 0.7*VCC is the amount of time it takes for the transceiver to interpret 0.5V CANH-CANL, and then RXD responding up to the specified level for a correct recessive threshold on the logic pins.

    Regards,

    Eric Hackett 

  • 0 in reply to Eric Hackett
    Prodigy 20 points

    Got it, differential will be 0.5V is the threshold for recessive level on CAN network.

    I have another question, I found the differential signal fail time (90%-10%) is to long (over 100ns) in my circuit, How to improve it?

  • 0 in reply to Barton Huang
    Guru 287370 points

    The fall time is determined by the total capacitance of your bus. Try decreasing or removing the capacitors.

  • 0 in reply to Clemens Ladisch
    Prodigy 20 points

    I removing the C365 & C366, but the fall time still over 100ns, is there any other reason?

  • +1 in reply to Barton Huang
    TI__Mastermind 19930 points

    Hi Barton,

    The datasheet test condition has 100pF CL which represents the capacitance of the whole test setup, not necessarily the added capacitance. To get a lower fall/rise time, ensure that the capacitance on the CAN bus is less than or equal to 100pF between CANH and CANL. The capacitance between CANH to ground and CANL to ground should also be minimized. The trace on your PCB can also contribute. I would recommend to use a digital multimeter to measure the bus capacitance first.

    Regards,

    Sean