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DP83TD510E-EVM: No active link between DP83822 and ethernet switch

Part Number: DP83TD510E-EVM
Other Parts Discussed in Thread: USB-2-MDIO, DP83TD510E

Tool/software:

Hi there,

first of all a little disclaimer, this is my first project using any kind of chip for ethernet communication.

I designed a custom board which includes the basic circuitry from the DP83TD510E-EVM (DP83TD with the DP83822). Unfortunately I overlooked the bootstrapping section and therefore am missing these resistors. The DP83822 chip is directly connected to a KSZ8895MLUB network switch chip.

After digging through the datasheets and several forum posts I discovered the problem with the bootstraps. I tried to configure everything usually done by the bootstraps with software programming instead. So after booting I set the following registers:

DP83TD:
0017 -> 4221 to activate RMII Master Mode
(50MHz clock is present on Pin23 of DP83822 after setting this register)

DP83822:
001F -> 8000 to reset chip after switching DP83TD into RMII master mode
0017 -> 00D1 for RMII configuration

However, there is still no active link between the DP83822 and the ethernet switch detected.

Am I missing any part of the configuration or is this more likely related to the circuitry?

Thanks

Kai

SinglePairEthernetTestboard.pdf

  • Additional remarks:

    Forgot to mention I accidentially placed a pull-down resistor on Pin 8 of DP83822 instead of a pull-up. I already removed it on one of my two identical boards and on the other board placed a pull-up. I did this before posting so above mentioned behaviour persists.

    Both the DP83TD and the DP83822 are visible to the USB-2-MDIO tool.

  • Hi Kai,

    Thank you for the detailed query.

    For direct connections between PHYs without a transformer, capacitive coupling is required on MDI lines.

    DP83822 is a current-mode driver, requiring 50ohm pull-ups on the MDI lines. I don't expect DP83822 and KSZ8895 to link unless these passives are included, similar to this diagram (Section 9.2.2 in datasheet):

    Thank you,

    Evan

  • Hey Evan,

    thank you for the quick reply! I think your suggestion helped. Now after setting the necessary registers, the respective LED is blinking on the KSZ8895. 

    Next thing I tried, was connecting both boards according to the scheme below. Unfortunately I was not able to establish a network connection on the PC. Am I missing some configuration or is the general setup not suitable for my application?
    The more general idea for the board design was to have a datalogging device with ethernet capabilities connected to the on board switch chip and then connect multiple datalogging boards with the help of the DP83TD chips over long distances to form a sensing network.

    Kai



  • Hi Kai,

    This setup is valid, I expect communication to work between PC and Network with the proper hardware config.

    Could you please share link status register read for both DP83822 (0x1[2]) and DP83TD510E (0x10[0])?

    If you see link up on both sides, I suspect the cause is with network settings or firewall. What is the ipv4 address setting used for the PC and network?

    Thank you,

    Evan

  • Hey Evan,

    thank you for your reply.
    Both boards have the same values.
    For DP83TD:
    0010 -> 0001

    For DP83822
    0001 -> 786D

    So it does indeed show, that a link is established on both sides, correct?

    I tried three different setups to test the transmission over SPE

    1. PC with static IP and DNS assigned by our IT admin connected to an ethernet switch connected to our network.
    2. PC with automatic IP and DNS (DHCP) connected to an ethernet switch connected to our network.
    3. Connecting from the PC to another Ethernet device without a network in between. Static IP adresses were also used on both devices.

    In all three cases did the connection work without the SPE devices in between.

    Best

    Kai

  • Hi Kai,

    So it does indeed show, that a link is established on both sides, correct?

    That is correct, both PHYs show link up. In this case, there may be an issue with the MAC interface between the PHYs.

    From the clock connections, it looks like DP83TD510E is intended for RMII master mode, and DP83822 is intended for RMII slave mode.

    DP83822:
    001F -> 8000 to reset chip after switching DP83TD into RMII master mode
    0017 -> 00D1 for RMII configuration

    Please adjust 0x17 register write for RMII slave configuration on 822:

    0x17 = 0xF1

    Thank you,

    Evan

  • Hey Evan,

    unfortunately I was still not able to set up a functioning connection.
    Just to double check:
    on the DP83TD I set 0017 -> 4021 (on my initial post I wrote 4221 but corrected this to 4021)
    on the DP83822 I tried both 0017 -> 00F1 as well as 00E1 (I believe it should be 00E1 since by default RMII rev. 1.2 is selected on both the 83822 and the 83TD correct?)

    One thing I found when checking my schematic is the bootstrap configuration for RX_D2 (DP83TD). For the eval. kit this pin is pulled up. In my schematic I accidentally left the pin unconnected. In the datasheet in 0x18[10] something is mentioned about CRS/DV. Is this the same register config that can be achieved with the bootstrap on RX_D2 or can this configuration only be achieved through bootstrapping?

    Thank you,

    Kai

  • Hi Kai,

    Sorry to hear it is not functioning, we can try a few more settings.

    RMII rev 1.2 is valid on both sides, this shouldn't cause any issues.

    Regarding RX_D2 strap, the corresponding register for this is 0x18[10]. For pull-up, this value should be '0'. Can you read back this register and test with both values?

    Thank you,

    Evan

  • Hey Evan,

    after startup 0x18[10] is indeed '1'. Unfortunately setting it to '0' did not change anything.

    Best

    Kai

  • Hi Kai,

    Thanks for confirming.

    As MDI side link is up on both 510 and 822, we can focus on debugging the MAC path between the PHYs.

    I recommend the following test case:

    • Enable loopback on DP83TD510E (0x0[14] = '1')
    • Send packets from PC -> 822 -> 510
    • Packets should be looped back at 510 and returned to PC

    Is this test possible from your side? If not, we can try probing MAC lines during ping to validate the signal path.

    Thank you,

    Evan

  • Hi Evan,

    unfortunately I am not completely sure, how to do the testing you suggested. I tried pinging some IP adresse through the windows command prompt. I also tried sending UDP and TCP packages with 'Packet Sender'. However, I was not sure how to validate that the sending of the packages itself was correct and the link was faulty or if the package sending itself was wrong.
    I am sorry if my limited knowledge of networks makes debugging difficult for you.

    Best

    Kai

  • Hi Kai,

    No worries!

    Do you have test points available for the MAC lines? It may be simpler to probe the lines during ping command to confirm there is activity on the lines, and that the waveforms match datasheet specifications.

    I believe the issue is with the MAC signaling between the PHYs, as both 822 and 510 report link status up on their MDI side.

    Another possibility is the network switch chip, I am unfamiliar with the communication happening on this side. Have you seen ping work with this chip in a similar configuration?

    Thank you,

    Evan

  • Hey Evan,

    I was not really able to distinguish the waveforms betweens sending a ping signal and idle activity but there were signals on the following lines:
    (all names in regard to the 83822 chip, different time scales between receiving and transmitting side, PC and network directly connected to the 83822 omitting the KSZ8895 switch)

    RX_D0:


    RX_D1:


    TX_D0:
     :

    TX_D1:


    I hope you can make something of these waveforms.

    Best,

    Kai

  • Hi Kai,

    Thank you for sharing the waveforms, this is the expected result during transmission.

    There is one more configuration step we may have missed - confirming DP83822 and the network switch chip are configured to link at 10M speed.

    For DP83822, please write 0x4[8:7] = '00' to force 10M speed.

    If possible, please apply a similar config on the switch chip to ensure it links at 10M.

    Register 0x10[1] can be read to confirm the speed during link on DP83822.

    Thank you,

    Evan

  • Hey Evan,

    yes that did the trick. Everything is now working as intended. Thank you so much for the quick replies and the support!

    Best

    Kai

  • HI Kai,

    Thanks for confirming this solved your issue. Closing this thread.