Tool/software:
DP83867 supports the expected 12 byte IPG at the MDI as well as lower amounts in some conditions. This number comes from IEEE802.3 section 4.4.2 which sets out that the minimum IPG for a transmitted frame is 12 bytes on the TX lines of the MAC. When the data comes to a PHY, there is a handoff of clocking domains and thus there is potential for IPG to be 11 bytes when sent on MDI line. In cases where the IPG is smaller, Reg 0x53[3:0] can help increase margin in these applications with no drawback on performance. The lowest that this can be set is to 0x3 (default is 0x5) which has been seen to support 11 IPG. Setting to 0x4 is also sufficient. Please note that this register is an extended register and thus needs 4-step process to read/write.