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SN65DSI83-Q1: SN65DSI83-Q1: Causes and solutions for occasional display screen blank issue

Part Number: SN65DSI83-Q1
Other Parts Discussed in Thread: SN65DSI83

Tool/software:

We have the same problem with SN65DSI83. There is a chance that there will be no display during the startup process.

Read the E5 register value:0XB1.

However, the read E5 register value that is displayed normally is also the same:0XB1.

Please help provide the following troubleshooting ideas

  • reg_CFG.txt
    static struct convert_reg_cfg convert_init_setup[] = {    //1024/50fps
    {I2C_ADDR_MAIN, 0x09, 0x00, 0},
    {I2C_ADDR_MAIN, 0x0A, 0x05, 0},
    {I2C_ADDR_MAIN, 0x0B, 0x10, 0},
    {I2C_ADDR_MAIN, 0x0D, 0x00, 10},
    {I2C_ADDR_MAIN, 0x10, 0x26, 0},
    {I2C_ADDR_MAIN, 0x11, 0x00, 0},
    {I2C_ADDR_MAIN, 0x12, 0x26, 0},
    {I2C_ADDR_MAIN, 0x13, 0x00, 0},
    {I2C_ADDR_MAIN, 0x18, 0x78, 0},
    {I2C_ADDR_MAIN, 0x19, 0x00, 0},
    {I2C_ADDR_MAIN, 0x1A, 0x03, 0},
    {I2C_ADDR_MAIN, 0x1B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x20, 0x00, 0},
    {I2C_ADDR_MAIN, 0x21, 0x05, 0},
    {I2C_ADDR_MAIN, 0x22, 0x00, 0},
    {I2C_ADDR_MAIN, 0x23, 0x00, 0},
    {I2C_ADDR_MAIN, 0x24, 0x00, 0},
    {I2C_ADDR_MAIN, 0x25, 0x00, 0},
    {I2C_ADDR_MAIN, 0x26, 0x00, 0},
    {I2C_ADDR_MAIN, 0x27, 0x00, 0},
    {I2C_ADDR_MAIN, 0x28, 0x21, 0},
    {I2C_ADDR_MAIN, 0x29, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2A, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2C, 0x0a, 0},
    {I2C_ADDR_MAIN, 0x2D, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2E, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2F, 0x00, 0},
    {I2C_ADDR_MAIN, 0x30, 0x0c, 0},
    {I2C_ADDR_MAIN, 0x31, 0x00, 0},
    {I2C_ADDR_MAIN, 0x32, 0x00, 0},
    {I2C_ADDR_MAIN, 0x33, 0x00, 0},
    {I2C_ADDR_MAIN, 0x34, 0x19, 0},
    {I2C_ADDR_MAIN, 0x35, 0x00, 0},
    {I2C_ADDR_MAIN, 0x36, 0x00, 0},
    {I2C_ADDR_MAIN, 0x37, 0x00, 0},
    {I2C_ADDR_MAIN, 0x38, 0x00, 0},
    {I2C_ADDR_MAIN, 0x39, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3A, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3C, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3D, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3E, 0x00, 5},
    
    //{I2C_ADDR_MAIN, 0xE0, 0x00, 1},
    {I2C_ADDR_MAIN, 0x0D, 0x01, 10}, //PLL enable
    {I2C_ADDR_MAIN, 0x09, 0x01, 0}, //soft reset
    };
    DJ080IA-11A_公版_V1_5_20160822(1).pdf

  • Hi,

    Did you try LVDS pattern generation? Without DSI input, this can be used to check the output LVDS interface working with the correct timings.

    Does register 0xE5 always show 0xB1? Have you read them multiple times are power cycling?

    Have you verified that the DSI settings match the input? It seems the 0xE5 register is showing multiple errors relating to DSI input including PLL unlock. Could you please check and share the DSI settings and clock rates?

    Best regards,
    Ikram


  • 1. When there is no display on the screen, Check the LVDS signal.

    pins38/39_CLKP/N:There is a signal output

    pins41/42_Y2P/N:There is a signal output

    other LVDS pins:There is no signal output

    2. Register E5, we power up and down many times to read mainly 0XB1, sometimes there is 0XF1。

    3. LVDS_CLK: 63.4MHz

        DSI_CLK = 191MHz

    1122.reg_CFG.txt
    static struct convert_reg_cfg convert_init_setup[] = {    //1024/50fps
    {I2C_ADDR_MAIN, 0x09, 0x00, 0},
    {I2C_ADDR_MAIN, 0x0A, 0x05, 0},
    {I2C_ADDR_MAIN, 0x0B, 0x10, 0},
    {I2C_ADDR_MAIN, 0x0D, 0x00, 10},
    {I2C_ADDR_MAIN, 0x10, 0x26, 0},
    {I2C_ADDR_MAIN, 0x11, 0x00, 0},
    {I2C_ADDR_MAIN, 0x12, 0x26, 0},
    {I2C_ADDR_MAIN, 0x13, 0x00, 0},
    {I2C_ADDR_MAIN, 0x18, 0x78, 0},
    {I2C_ADDR_MAIN, 0x19, 0x00, 0},
    {I2C_ADDR_MAIN, 0x1A, 0x03, 0},
    {I2C_ADDR_MAIN, 0x1B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x20, 0x00, 0},
    {I2C_ADDR_MAIN, 0x21, 0x05, 0},
    {I2C_ADDR_MAIN, 0x22, 0x00, 0},
    {I2C_ADDR_MAIN, 0x23, 0x00, 0},
    {I2C_ADDR_MAIN, 0x24, 0x00, 0},
    {I2C_ADDR_MAIN, 0x25, 0x00, 0},
    {I2C_ADDR_MAIN, 0x26, 0x00, 0},
    {I2C_ADDR_MAIN, 0x27, 0x00, 0},
    {I2C_ADDR_MAIN, 0x28, 0x21, 0},
    {I2C_ADDR_MAIN, 0x29, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2A, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2C, 0x0a, 0},
    {I2C_ADDR_MAIN, 0x2D, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2E, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2F, 0x00, 0},
    {I2C_ADDR_MAIN, 0x30, 0x0c, 0},
    {I2C_ADDR_MAIN, 0x31, 0x00, 0},
    {I2C_ADDR_MAIN, 0x32, 0x00, 0},
    {I2C_ADDR_MAIN, 0x33, 0x00, 0},
    {I2C_ADDR_MAIN, 0x34, 0x19, 0},
    {I2C_ADDR_MAIN, 0x35, 0x00, 0},
    {I2C_ADDR_MAIN, 0x36, 0x00, 0},
    {I2C_ADDR_MAIN, 0x37, 0x00, 0},
    {I2C_ADDR_MAIN, 0x38, 0x00, 0},
    {I2C_ADDR_MAIN, 0x39, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3A, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3C, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3D, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3E, 0x00, 5},
    
    //{I2C_ADDR_MAIN, 0xE0, 0x00, 1},
    {I2C_ADDR_MAIN, 0x0D, 0x01, 10}, //PLL enable
    {I2C_ADDR_MAIN, 0x09, 0x01, 0}, //soft reset
    };

  • Hi,

    The DSI83-Q1 has an internal pattern generation feature which can be enabled by setting the CHA_TEST_PATTERN bit at address 0×3C and configuring the TEST PATTERN GENERATION PURPOSE ONLY register as shown below.

    Are you able to see the test pattern if you enable this feature?

    Thanks

    David

  • Is it a 0X3C to execute after powering on and finding that it cannot be displayed?
    Are there any other registers that need to be configured after the 0X3C is executed.

  • Hi,

    You can use the attached tool to generate the DSI83-Q1 register programming value and also use it enable the test pattern.

    DSI-Tuner.7z

    Are you also properly following the DSI83-Q1 power-up sequence?

    Thanks

    David

  • Hi

    We found that the system booted SN65DSI83 write registers, which was not done as required for initialization.
    1. What should theoretically be the value of the 0XE5 register that is read for normal startup.
    2. After we have optimized, we can read whether the registered value of the 0XE5 is 0X1 and whether this value is correct.

  • Hello,

    It would help to first configuring LVDS input with internal pattern generation to make sure the LVDS output and configuration works with the display? Have you verified this?

    0xE5 being 0x1 on startup means that PLL is unlocked; meaning it could not lock with the incoming DSI input. Please use the DSI tuner tool and this app note: https://www.ti.com/lit/an/slla332b/slla332b.pdf

    Best regards,
    Ikram

  • Our device reads the register 0xE5 value every time it reads the 0X1. I wonder if I have finished washing and writing the registers, and finally execute the actions shown in the figure.


    Is this written correctly?

    //{I2C_ADDR_MAIN, 0xE0, 0x00, 1},
    {I2C_ADDR_MAIN, 0x0D, 0x01, 10}, //PLL enable
    {I2C_ADDR_MAIN, 0x09, 0x01, 0}, //soft reset
    };

    4705.reg_CFG.txt
    static struct convert_reg_cfg convert_init_setup[] = {    //1024/50fps
    {I2C_ADDR_MAIN, 0x09, 0x00, 0},
    {I2C_ADDR_MAIN, 0x0A, 0x05, 0},
    {I2C_ADDR_MAIN, 0x0B, 0x10, 0},
    {I2C_ADDR_MAIN, 0x0D, 0x00, 10},
    {I2C_ADDR_MAIN, 0x10, 0x26, 0},
    {I2C_ADDR_MAIN, 0x11, 0x00, 0},
    {I2C_ADDR_MAIN, 0x12, 0x26, 0},
    {I2C_ADDR_MAIN, 0x13, 0x00, 0},
    {I2C_ADDR_MAIN, 0x18, 0x78, 0},
    {I2C_ADDR_MAIN, 0x19, 0x00, 0},
    {I2C_ADDR_MAIN, 0x1A, 0x03, 0},
    {I2C_ADDR_MAIN, 0x1B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x20, 0x00, 0},
    {I2C_ADDR_MAIN, 0x21, 0x05, 0},
    {I2C_ADDR_MAIN, 0x22, 0x00, 0},
    {I2C_ADDR_MAIN, 0x23, 0x00, 0},
    {I2C_ADDR_MAIN, 0x24, 0x00, 0},
    {I2C_ADDR_MAIN, 0x25, 0x00, 0},
    {I2C_ADDR_MAIN, 0x26, 0x00, 0},
    {I2C_ADDR_MAIN, 0x27, 0x00, 0},
    {I2C_ADDR_MAIN, 0x28, 0x21, 0},
    {I2C_ADDR_MAIN, 0x29, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2A, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2C, 0x0a, 0},
    {I2C_ADDR_MAIN, 0x2D, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2E, 0x00, 0},
    {I2C_ADDR_MAIN, 0x2F, 0x00, 0},
    {I2C_ADDR_MAIN, 0x30, 0x0c, 0},
    {I2C_ADDR_MAIN, 0x31, 0x00, 0},
    {I2C_ADDR_MAIN, 0x32, 0x00, 0},
    {I2C_ADDR_MAIN, 0x33, 0x00, 0},
    {I2C_ADDR_MAIN, 0x34, 0x19, 0},
    {I2C_ADDR_MAIN, 0x35, 0x00, 0},
    {I2C_ADDR_MAIN, 0x36, 0x00, 0},
    {I2C_ADDR_MAIN, 0x37, 0x00, 0},
    {I2C_ADDR_MAIN, 0x38, 0x00, 0},
    {I2C_ADDR_MAIN, 0x39, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3A, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3B, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3C, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3D, 0x00, 0},
    {I2C_ADDR_MAIN, 0x3E, 0x00, 5},
    
    //{I2C_ADDR_MAIN, 0xE0, 0x00, 1},
    {I2C_ADDR_MAIN, 0x0D, 0x01, 10}, //PLL enable
    {I2C_ADDR_MAIN, 0x09, 0x01, 0}, //soft reset
    };

  • I will check the initialization sequence and get back to you.

    Best regards,
    Ikram

  • Hi Whether the initialization is correct?

  • Hello,

    If the initialization script is working usually, then you could modify for test pattern generation. Please set register 0x3C = 0x10, and check that the LVDS output is displaying. 

    Also, in the init script, you can add a line to write 0xE5 = 0xFF. This will clear the register during initialization. Then read this register to make sure it is cleared, and also let us know the value of 0xE5 when the display blank issue occurs.

    How often does this issue occur? Does it clear after a soft reset is done?
    Also, in your system is it possible to use a REFCLK?

    Best regards,
    Ikram