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DS90UH981-Q1: Regarding the use of PORT_SEL register for DS90UH981-Q1,(offset:0x2d)

zhouyi zhouy
Prodigy 30 points
Part Number: DS90UH981-Q1

Tool/software:

When do we need to operate the PORT_SEL register? If using the indirect registers (0x40~0x42) in 981 to access the DPHY_SKIP_TIMING register in page 4, how do I set the PORT_SL register?

  • +1
    TI__Mastermind 18975 points

    Hi Zhouyi,

    The PORT_SEL register should be utilized when operating the UH981 serializer in a Y-split configuration (when port 0 is connected to one deserializer and port 1 is connected to a separate second deserializer). In these Y-split configurations, certain port-specific registers have two copies of the register - one for each FPD-Link port. Toggling this PORT_SEL bit is what allows you to read/write to the desired copy of these port-specific registers.

    The PORT_SEL register is not required when accessing the DPHY_SKIP_TIMING registers as there are already two devoted indirect pages for each separate DSI input port.

    Let me know if you have any additional questions.

    Best,

    Nikolas