DS160PR410: schematic review

Hi Jeff,

I've looked over the schematic. Please find my comments below.

• EN_SMB: Options for Pin Mode (currently selected), I2C Master, or I2C Slave mode (ok)
• SCL / SDA: Connected to I2C33_SCL/SDA lines
  • Please ensure pull-up resistors are present on the I2C bus lines
• GAIN / VOD: Both floating for 0dB DC Gain (ok)
• EQ1_ADDR1 / EQ0_ADDR0: Both floating, indicating EQ Index 10 in Pin Mode.
  • Note that these pins should be strapped appropriately for the desired EQ Index.
• ALL_DONE_N: Floating for Pin Mode, option for 4.7k pull-up resistor for I2C Master mode (ok) 
• READ_EN_N: Strapped 4.7k to VDD for Pin Mode, option to pull low for I2C Master mode (ok)
• RX_DET: Strapped 1k to GND for 2x valid detections (ok)
• PWDN1 / 2: Tied to GND through 4.7k pull-down, turning on all device channels always (ok).
  • Note that a system level controller or PCIe control signal (such as an inverted PERST# signal) could alternately be used to control device PWDN.
• RXnP / N: Connected to GFX_TX0-7+/-, which are AC Coupled using 220nF caps (ok)
• TXnP / N: Connected to PCIe_SLOT8X_HTDR0-7+/-
  
  • Please ensure that the TX pins of the redriver are AC coupled to the other PCIe device
• VREG_1 / 2: 0.1uF de-coupling caps near each pin (ok).
• VDD_1 / 2 / 3 / 4: Connected to 1x 10uF, 3x 0.1uF de-coupling caps
  • Per data sheet Section 9, please note that it is recommended to have one (1) 0.1uF de-coupling capacitor per VDD pin (4 total), one 1.0 µF bulk capacitor per device, and one 10 µF bulk capacitor per power bus that delivers power to one or more DS160PR410 devices. The local decoupling (0.1 µF) capacitors must be connected as close to the VDD pins as possible and with minimal path to the DS160PR410 ground pad.
• NC: Not connected (ok)
• RSVD: Not connected (ok)
• GND: Connected to GND (ok)

Please let me know if you have any questions or additional comments.

Best,
David