DP83TC812R-Q1: 100BASE-T1 bootstrap Configuration problem

Part Number: DP83TC812R-Q1

Tool/software:

HI TI Teams

The 100BASE-T1 Master & 100BASE-T1 Slave selection is determined by the bootstrap via IO pin settings. Could you please clarify which voltage (VDDA, VDDI, VDDMAC, VSLEEP) the bootstrap refers to?

Also, if RESET transitions from LOW to HIGH, will the bootstrap be re-read?