DS90UH941AS-Q1EVM: Assistance Required: DS90UH941AS + DS90UH948 with Raspberry Pi CM4 (Debian Bookworm)

Part Number: DS90UH941AS-Q1EVM
Other Parts Discussed in Thread: DS90UB941AS-Q1EVM, DS90UB926QSEVB, ALP

Tool/software:

Dear TI Support Team,

I am working with the DS90UH941AS-Q1EVM serializer and DS90UH948 deserializer to drive an 800x480 RGB display. I am able to successfully display the test pattern from the Analog LaunchPad on the RGB display connected to the DS90UH948.

However, when I connect the DSI-1 output of the Raspberry Pi CM4 (running Debian Bookworm, Linux kernel 6.6) to the DS90UH941AS input, I do not see any video on my RGB display. But no actual video output is shown.

System Details:

  • Serializer: DS90UH941AS-Q1EVM
  • Deserializer: DS90UH948
  • Source: Raspberry Pi CM4, running Debian Bookworm (Linux kernel 6.6)
  • Display: 7-inch RGB TFT (confirmed working with TI's test pattern)
  • DSI Output: 800x480@60Hz, 4-lane DSI

Observations:

  1. The test pattern from the serializer displays correctly on the screen, meaning the deserializer-to-RGB connection is correct.
  2. The CM4’s DSI output is active, but the display does not receive the video signal.

Request for Assistance:

Could you please provide guidance on the necessary I2C register configurations for both the DS90UH941AS and DS90UH948 to properly receive the DSI video signal from the Raspberry Pi CM4 and display it on the RGB panel?

Specifically, I need:

  • The correct register sequence to configure the DS90UH941AS for 4-lane DSI input at 800x480@60Hz.
  • The required settings on the DS90UH948 to correctly interpret the signal and drive the RGB panel.
  • Any clock settings, polarity adjustments, or link configurations that might be required.

Your assistance would be greatly appreciated. Looking forward to your response.

Best regards,

Abhimanyu

  • Hi Abhimanyu,

    Thank you for providing the background information on your system. We have an app note that outlines steps to take in case of issues with the DSI interface on the UH941AS. Before I attach the link, let me answer your questions first.

    The correct register sequence to configure the DS90UH941AS for 4-lane DSI input at 800x480@60Hz.

    I have attached an example UH941AS configuration script. Beyond setting up the THS-SKIP register, the other applicable option would be if you are using Sync Pulses or Sync Events. If you are using Sync Events, additional programming is necessary as outlined in UH941AS datasheet section 8.4.2.2.1

    Please note that I have left the THS-SKIP value empty because I do not know the pixel clock frequency or DSI lane frequency of your system. Do you know the DSI frequency or pixel clock frequency?

    941_config_minda.txt
    # Example 941AS config script
    
    serAddr = 0x18
    desAddr = 0x58
    
    board.WriteI2C(serAddr, 0x01, 0x08) # Disable DSI
    
    # Program TSKIP_CNT on DSI Port 0
    # DSI Port 0 = ???
    board.WriteI2C(serAddr, 0x40, 0x04)
    board.WriteI2C(serAddr, 0x41, 0x05)
    board.WriteI2C(serAddr, 0x42, ) # TSKIP_CNT = ???
    board.WriteI2C(serAddr, 0x01, 0x00) # Enable DSI
    
    board.WriteI2C(serAddr, 0x3, 0x96) # Enable I2C pass-through

    The required settings on the DS90UH948 to correctly interpret the signal and drive the RGB panel.

    If you are seeing correct output from the PATGEN, then other register settings are optional. The UH948 will automatically deserialize the incoming signal and output on the OLDI interface. 

    DSI Bring-Up App Note and Steps

    App Note: Link

    DSI TX Requirements

    • Clock lane must be continuous
    • Low power data transmission and low power escape modes are not supported
    • DSI TX enables LP-11 at least once during video blanking period (See Section 2.3 of app note)

    Please note that page 8 outlines a debug flow for DSI bring-up. Following this debug flow will help with understanding why the DSI video is not recognized by the UH941AS.

    Serializer PATGEN Steps

    • Test serializer PATGEN with internal timing and external timing
    • Test serializer PATGEN with external timing and external clock

    Best,

    Jack

  • below is the frequency details for my dsi

    xrandr --newmode "800x480_60.00" 29.58 800 840 968 1056 480 486 494 500 -hsync +vsync
    

    This defines a new resolution mode called "800x480_60.00" with the following parameters:

    Parameter Value Description
    "800x480_60.00" Name Identifies the mode (can be any name).
    29.58 Dot Clock (MHz) Pixel clock frequency in MHz.
    800 Horizontal Active Pixels Number of pixels per row.
    840 Horizontal Sync Start Start of horizontal sync pulse.
    968 Horizontal Sync End End of horizontal sync pulse.
    1056 Horizontal Total Total number of pixels per row (including blanking).
    480 Vertical Active Lines Number of lines per frame.
    486 Vertical Sync Start Start of vertical sync pulse.
    494 Vertical Sync End End of vertical sync pulse.
    500 Vertical Total Total number of lines per frame (including blanking).
    -hsync +vsync Sync Polarity

    Horizontal sync is negative, vertical sync is positive.

  • Hi Abimanyu,

    Thank you for the video timing information. The DSI clock rate can be calculated as: fDSI = fPCLK * 12 / Nlanes. This gives us a DSI CLK rate of 88.74MHz. 

    The TSKIP_CNT value comes out to be 1 with the DSI CLK of 88.74MHz. I updated this in the script. I also updated the script to reflect the fact that you are intending the Horizontal sync polarity to be negative.

    4214.941_config_minda.txt
    # Example 941AS config script
    
    serAddr = 0x18
    desAddr = 0x58
    
    board.WriteI2C(serAddr, 0x01, 0x08) # Disable DSI
    
    # Program TSKIP_CNT on DSI Port 0
    # DSI Port 0 = 177.48Mbps/lane
    board.WriteI2C(serAddr, 0x40, 0x04)
    board.WriteI2C(serAddr, 0x41, 0x05)
    board.WriteI2C(serAddr, 0x42, 0x2) # TSKIP_CNT = 0x1. Left shift one
    board.WriteI2C(serAddr, 0x41, 0x21) #DSI_CONFIG_1
    board.WriteI2C(serAddr, 0x42, 32) #DSI HS Polarity is active low
    board.WriteI2C(serAddr, 0x01, 0x00) # Enable DSI
    
    
    
    board.WriteI2C(serAddr, 0x3, 0x96) # Enable I2C pass-through

    Serializer PATGEN Steps

    • Test serializer PATGEN with internal timing and external timing
    • Test serializer PATGEN with external timing and external clock

    Have you already tried these steps? Can you confirm that you have lock with the 948 when you are not running the 941AS PATGEN and using the DSI clock?

    Best,

    Jack

  • Hi Jack,

    where and how to set below points for test and what are the other settings need to do:

    • Test serializer PATGEN with internal timing and external timing
    • Test serializer PATGEN with external timing and external clock

    As pattern generation shows option only change timing source:

    Today I tried tested:

    first in generated pattern with internal timing source and I got pattern but when I switched to external timing source after turning on my RPI CM4 as DSI source i did not get any pattern or video on lcd.

    below settings I did with total area 1024x800:

     In this below script do i need to do any other settings also related to fps resolution rgb888 something like that as per my DSI source details given above.

    # Example 941AS config script

    serAddr = 0x18
    desAddr = 0x58

    board.WriteI2C(serAddr, 0x01, 0x08) # Disable DSI

    # Program TSKIP_CNT on DSI Port 0
    # DSI Port 0 = 177.48Mbps/lane
    board.WriteI2C(serAddr, 0x40, 0x04)
    board.WriteI2C(serAddr, 0x41, 0x05)
    board.WriteI2C(serAddr, 0x42, 0x2) # TSKIP_CNT = 0x1. Left shift one
    board.WriteI2C(serAddr, 0x41, 0x21) #DSI_CONFIG_1
    board.WriteI2C(serAddr, 0x42, 32) #DSI HS Polarity is active low
    board.WriteI2C(serAddr, 0x01, 0x00) # Enable DSI

    Does serializer keep the settings saved or every time need to do this settings.

    Regards

    Abhimanyu

  • I jack,

    Today I did some activity with script given by you but i did not got any display expect test patten (test patten also when clock source i selected internal or Internal w/ext. clock not worked on only external).

    Below are the reference details I am providing so you may understand and suggest me changes.

    My TFT LCD datasheet

    I tried script given by you as we i got another script from internet that also i tried as below

    #!/bin/bash

    I2C_BUS=1 # Change if needed (1 for Raspberry Pi)
    SERIALIZER_ADDR=0x0C # DS90UH941AS I2C address

    echo "Starting DS90UH941AS Configuration..."

    # Step 1: Disable DSI input (put serializer in standby)
    echo "Disabling DSI input..."
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x01 0x08 # Set bit 3 to disable DSI input

    # Step 2: Set DSI Port Configuration
    echo "Configuring DSI Port Selection..."
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x40 0x08 # Select DSI Port 0 (Use 0x08 for DSI1)
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x41 0x05 # Set timing for DSI
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x42 0x02 # TSKIP_CNT = 0x1 (Left shift one)

    # Step 3: Configure DSI Settings
    echo "Configuring DSI settings..."
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x41 0x21 # DSI_CONFIG_1
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x42 0x20 # DSI HS Polarity is active low

    # Step 4: Configure Display Timings (from Panel Datasheet)
    echo "Setting Panel Timing Parameters..."
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x4B 0x00 # Horizontal Sync Width (48)
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x4C 0x30 # Horizontal Back Porch (30)
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x4D 0xA6 # Horizontal Front Porch (166)
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x4E 0x03 # Vertical Sync Width (3)
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x4F 0x0F # Vertical Back Porch (15)
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x50 0x50 # Vertical Front Porch (80)

    # Step 5: Configure FPD-Link III output (if needed)
    echo "Configuring FPD-Link III output..."
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x4F 0x00 # Normal FPD-Link mode (change if needed)

    # Step 6: Enable DSI input again
    echo "Enabling DSI input..."
    i2cset -y $I2C_BUS $SERIALIZER_ADDR 0x01 0x00 # Clear bit 3 to enable DSI input

    echo "Serializer Configuration Complete!"

    below are the settings i did in rpi: 

    I followed this document for this configuration:

    linux/arch/arm/boot/dts/overlays/README at 9da8d6df2051478f0ba16d73c65995955c19cb3a · raspberrypi/linux · GitHub

    At the end i am not able to see any video in my panel

    suggest me further what i can do.

    Regards

    Abhimanyu

  • Hi Abhimanyu,

    Can you run the following script on your 941AS so I can inspect the DSI registers?

    941_DSI_Registers.py
    devAddr = 0x18
    
    if board.ReadI2C(devAddr, 0) == 0x0:
        raise(Exception("Check for correct I2C address"))
    
    # DSI Port 0 Page Dump
    print "DSI Port 0 Registers"
    board.WriteI2C(devAddr,0x40,0x5)
    for x in range(0,59):
        val = hex(x)
        print(str(val) + " ="),
        board.WriteI2C(devAddr, 0x41, x)
        val=board.ReadI2C(devAddr,0x42)
        print(str(hex(val)))
    
    
    # DSI Port 1 Page Dump
    print "DSI Port 1 Complete"
    board.WriteI2C(devAddr,0x40,0x8)
    for x in range(0,59):
        val = hex(x)
        print(str(val) + " ="),
        board.WriteI2C(devAddr, 0x41, x)
        val=board.ReadI2C(devAddr,0x42)
        print(str(hex(val)))
    

    but i did not got any display expect test patten (test patten also when clock source i selected internal or Internal w/ext. clock not worked on only external).

    If PATGEN with external timing is not working, this either means that the LP11 transitions are not present from the DSI source or the timing from the DSI source is incorrect.

    In the DSI bringup app note for the 941AS, please follow Section 4.2 to confirm if there are missing periodic low power transitions.

    Best,

    Jack

  • Dear Jack,

    I have run the given script, blow are the output:

    *** Running 941_DSI_Registers.py ***
    DSI Port 0 Registers
    0x0 = 0x0
    0x1 = 0x0
    0x2 = 0x0
    0x3 = 0x1d
    0x4 = 0x14
    0x5 = 0x2
    0x6 = 0x0
    0x7 = 0x0
    0x8 = 0x0
    0x9 = 0x0
    0xa = 0x0
    0xb = 0x0
    0xc = 0x0
    0xd = 0x0
    0xe = 0x0
    0xf = 0x10
    0x10 = 0x0
    0x11 = 0x0
    0x12 = 0x0
    0x13 = 0x0
    0x14 = 0x0
    0x15 = 0x0
    0x16 = 0x0
    0x17 = 0x0
    0x18 = 0x0
    0x19 = 0x0
    0x1a = 0x0
    0x1b = 0x0
    0x1c = 0x0
    0x1d = 0x0
    0x1e = 0x0
    0x1f = 0x0
    0x20 = 0x7f
    0x21 = 0x20
    0x22 = 0xff
    0x23 = 0x7f
    0x24 = 0x0
    0x25 = 0x0
    0x26 = 0x0
    0x27 = 0x0
    0x28 = 0x0
    0x29 = 0x0
    0x2a = 0x0
    0x2b = 0x0
    0x2c = 0x0
    0x2d = 0x0
    0x2e = 0x0
    0x2f = 0x0
    0x30 = 0x0
    0x31 = 0x20
    0x32 = 0x0
    0x33 = 0x4
    0x34 = 0x0
    0x35 = 0x20
    0x36 = 0x0
    0x37 = 0x0
    0x38 = 0x0
    0x39 = 0x0
    0x3a = 0x2
    DSI Port 1 Complete
    0x0 = 0x0
    0x1 = 0x0
    0x2 = 0x0
    0x3 = 0x1d
    0x4 = 0x14
    0x5 = 0x2
    0x6 = 0x0
    0x7 = 0x0
    0x8 = 0x0
    0x9 = 0x0
    0xa = 0x0
    0xb = 0x0
    0xc = 0x0
    0xd = 0x0
    0xe = 0x0
    0xf = 0x10
    0x10 = 0x0
    0x11 = 0x0
    0x12 = 0x0
    0x13 = 0x0
    0x14 = 0x0
    0x15 = 0x0
    0x16 = 0x0
    0x17 = 0x0
    0x18 = 0x0
    0x19 = 0x0
    0x1a = 0x0
    0x1b = 0x0
    0x1c = 0x0
    0x1d = 0x0
    0x1e = 0x0
    0x1f = 0x0
    0x20 = 0x7f
    0x21 = 0x20
    0x22 = 0xff
    0x23 = 0x7f
    0x24 = 0x0
    0x25 = 0x0
    0x26 = 0x0
    0x27 = 0x0
    0x28 = 0x0
    0x29 = 0x0
    0x2a = 0x0
    0x2b = 0x0
    0x2c = 0x0
    0x2d = 0x0
    0x2e = 0x0
    0x2f = 0x0
    0x30 = 0x0
    0x31 = 0x20
    0x32 = 0x0
    0x33 = 0x4
    0x34 = 0x0
    0x35 = 0x20
    0x36 = 0x0
    0x37 = 0x0
    0x38 = 0x0
    0x39 = 0x0
    0x3a = 0x2
    *** Script execution time 0 min 3.658 sec ***
    >

    please analyze and let me know the further steps to do.

    Regads

    Abhimanyu

  • HI jack,

    I have run the given script, blow are the output:

    *** Running 941_DSI_Registers.py ***
    DSI Port 0 Registers
    0x0 = 0x0
    0x1 = 0x0
    0x2 = 0x0
    0x3 = 0x1d
    0x4 = 0x14
    0x5 = 0x2
    0x6 = 0x0
    0x7 = 0x0
    0x8 = 0x0
    0x9 = 0x0
    0xa = 0x0
    0xb = 0x0
    0xc = 0x0
    0xd = 0x0
    0xe = 0x0
    0xf = 0x10
    0x10 = 0x0
    0x11 = 0x0
    0x12 = 0x0
    0x13 = 0x0
    0x14 = 0x0
    0x15 = 0x0
    0x16 = 0x0
    0x17 = 0x0
    0x18 = 0x0
    0x19 = 0x0
    0x1a = 0x0
    0x1b = 0x0
    0x1c = 0x0
    0x1d = 0x0
    0x1e = 0x0
    0x1f = 0x0
    0x20 = 0x7f
    0x21 = 0x20
    0x22 = 0xff
    0x23 = 0x7f
    0x24 = 0x0
    0x25 = 0x0
    0x26 = 0x0
    0x27 = 0x0
    0x28 = 0x0
    0x29 = 0x0
    0x2a = 0x0
    0x2b = 0x0
    0x2c = 0x0
    0x2d = 0x0
    0x2e = 0x0
    0x2f = 0x0
    0x30 = 0x0
    0x31 = 0x20
    0x32 = 0x0
    0x33 = 0x4
    0x34 = 0x0
    0x35 = 0x20
    0x36 = 0x0
    0x37 = 0x0
    0x38 = 0x0
    0x39 = 0x0
    0x3a = 0x2
    DSI Port 1 Complete
    0x0 = 0x0
    0x1 = 0x0
    0x2 = 0x0
    0x3 = 0x1d
    0x4 = 0x14
    0x5 = 0x2
    0x6 = 0x0
    0x7 = 0x0
    0x8 = 0x0
    0x9 = 0x0
    0xa = 0x0
    0xb = 0x0
    0xc = 0x0
    0xd = 0x0
    0xe = 0x0
    0xf = 0x10
    0x10 = 0x0
    0x11 = 0x0
    0x12 = 0x0
    0x13 = 0x0
    0x14 = 0x0
    0x15 = 0x0
    0x16 = 0x0
    0x17 = 0x0
    0x18 = 0x0
    0x19 = 0x0
    0x1a = 0x0
    0x1b = 0x0
    0x1c = 0x0
    0x1d = 0x0
    0x1e = 0x0
    0x1f = 0x0
    0x20 = 0x7f
    0x21 = 0x20
    0x22 = 0xff
    0x23 = 0x7f
    0x24 = 0x0
    0x25 = 0x0
    0x26 = 0x0
    0x27 = 0x0
    0x28 = 0x0
    0x29 = 0x0
    0x2a = 0x0
    0x2b = 0x0
    0x2c = 0x0
    0x2d = 0x0
    0x2e = 0x0
    0x2f = 0x0
    0x30 = 0x0
    0x31 = 0x20
    0x32 = 0x0
    0x33 = 0x4
    0x34 = 0x0
    0x35 = 0x20
    0x36 = 0x0
    0x37 = 0x0
    0x38 = 0x0
    0x39 = 0x0
    0x3a = 0x2
    *** Script execution time 0 min 3.658 sec ***
    >

    With addition of above dsi test code log today i performed one more activity.

    i buyed one dsi display from waveshare https://www.waveshare.com/wiki/7inch_DSI_LCD

    and connected to dsi1 port of my cm4 and added below line in cm4 /boot/firmware/config.txt file

    dtoverlay=vc4-kms-dsi-7inch

    after reboot i got display of this waveshare dsi pannel.

    If is is driver issue compatible with this ti serialize, can TI support and provide use linux driver for
    serializer that we can install/load in Raspberry Pi CM4.

    please analyze and let me know the further steps to do.



    Regards
    ABhimanyu

  • Hi Abhimanyu,

    Thank you for providing the DSI register statuses. Please allow me 1-2 business days to look into them further.

    In the meantime, were you able to confirm if any LP-11 transitions were dropped? As Jack outlined above, how to confirm whether or not the DSI source is outputting these periodic low-power transitions is described in Section 4.2 of the following app note (link).

    Best,

    Nikolas

  • Hi Nikolas,

    I have captured the waveform of data line for DSI as attached below, with the same I have tested with my DSI displ. I am getting video on DSI Display but not on serializer-desrializer display.

    Please analyze and let me no further step to move forward.

    Regards

    Abhimanyu

  • Hi Abhimanyu,

    Thank you this update. Can you provide a more zoomed in capture at the red boxed area?

    Best,

    Nikolas

  • Hi Nikolas,

    I am able to upload/past directly in body i am attaching the onedrive link for the waveform:DSI waveform.

    Hope it helps to move forward.

    Regards

    Abhimanyu

  • Hi Abhimanyu,

    I'll be following up shortly.

    Best,

    Jack

  • Hi Abhimanyu,

    The DSI waveform shows that there is no LP11 state entered during the blanking period. Below is an example of how LP11 looks in comparison to the HS data transmission. LP11 is around 1.2v according to the D-PHY standard.

    In the DSI bring up app note, there are two example flags that can be used to see if there is an option in the DSI source driver to enabled LP11 during BLLP.

    There is no workaround for a DSI source that does not enter LP11 at least once per frame during the BLLP period.

    Best,

    Jack

  • Hi Jack,

    thanks for input i confirmed with my board vendor that is Raspberry pi LP11 is enabled by default.

    ref response : forums.raspberrypi.com/viewtopic.php

    ...

    Here is the waveform that i captured and it looks like as expected.

    IMG1

    img1

    IMG2

    img2

    IMG3

    img3

    IMG4

    img4

    Here is the reference kernel overlay and doc link: 

    doc : https://github.com/raspberrypi/linux/blob/rpi-6.12.y/Documentation/devicetree/bindings/display/panel/panel-dsi.yaml

    overlay : https://github.com/raspberrypi/linux/blob/rpi-6.12.y/arch/arm/boot/dts/overlays/vc4-kms-dsi-generic-overlay.dts

    ref kernel src: https://github.com/raspberrypi/linux/blob/rpi-6.12.y/drivers/gpu/drm/vc4/vc4_dsi.c#L1183

    please check and confirm.

    Regards

    Abhimanyu

  • Hi Abhimanyu,

    Thank you for the additional scope shots and the forum link. From the previous register dump I saw that DSI Indirect Register 0x2A was 0. The 941AS DSI receiver is still not able to identify the incoming DSI data types.

    Here is the waveform that i captured and it looks like as expected.

    We are seeing the LP11 state but there can still be issues if the LP11 state does not occur at the right time or if it affects the timing packets.

    Can you try enabling option #2 (DSI_DISP0_LP_STOP_PERFRAME) so that the LP11 state is not entered on every line? Even if LP11 is entered at least once per frame if it occurs at an incorrect spot, it can interfere with how the 941AS determines the incoming video timing.

    Best,

    Jack

  • Hi Jack,

    I have checked this driver already having #2 (DSI_DISP0_LP_STOP_PERFRAME) this enabled,

    here is my connections diagram that is working for pattern generator:

    In my panel used DE instead of hsync and vsync and it is working with pattern generator with this setup.

    I am confusing in DP switch position:

    I did setup as per below table of this document : www.ti.com/.../snlu241a.pdf

    for other connection also i refereed same document.

    but another place on the same document is telling to make only one dp switch high: see below the table.

    if i will follow table two the many dp switch i have to make high.

    below is status image of dp switch:

    also here is my timing setting as per display datasheet that i shared earlier:

    dtoverlay=vc4-kms-dsi-generic,clock-frequency=33200000
    dtparam=hactive=800,hfp=166,hsync=48,hbp=30
    dtparam=vactive=480,vfp=80,vsync=3,vbp=15
    dtparam=rgb888,four-lane

    below is the video mode selected in overlay file:
     mode = "MODE_VIDEO", "MODE_VIDEO_BURST", "MODE_NO_EOT_PACKET";

    based on my connection setup, timing configuration and video setting can you provide the initializing script for for ser-des.
    because still I am able to run only pattern generator.

    also let me know if there is any connection issue as DSI I have verified with dsi display.

    Regards
    Abhimanyu
  • Hi Abhimanyu,

    for other connection also i refereed same document.

    but another place on the same document is telling to make only one dp switch high: see below the table.

    if i will follow table two the many dp switch i have to make high.

    For the DIP switches on the EVM, only set one value high to set the correct MODE_SEL. I do not see an issue with your current DIP settings.

    I have checked this driver already having #2 (DSI_DISP0_LP_STOP_PERFRAME) this enabled,

    The driver is entering LP11 after each line since we are seeing this happening in a much smaller time frame than ~16ms. This is happening because the DSI driver is set to burst mode.

    below is the video mode selected in overlay file:
     mode = "MODE_VIDEO", "MODE_VIDEO_BURST", "MODE_NO_EOT_PACKET";

    Can you change MODE_VIDEO_BURST to MODE_VIDEO_SYNC_PULSE? You might need to play around with the different driver options to see which one is compatible with the 941AS. 

    Check DSI indirect register 0x2A after changing the DSI driver options to see if the 941AS is properly detecting the DSI data type.

    Are you connected to 941AS DSI Port 0 or 941AS DSI Port 1?

    based on my connection setup, timing configuration and video setting can you provide the initializing script for for ser-des.
    because still I am able to run only pattern generator.

    The same script I made above is still valid for this configuration. Main concern at this point is to figure out if there a driver configuration valid for the 941AS.

    Best,

    Jack

  • Hi Jack,

    I have connected to 941AS DSI Port 1 as shown in ref block diagram.

    I will check the video suggested dsi video mode setting and update.

    Regards

    Abhimanyu

  • Hi Abhimanyu,

    Sounds good. Do you have access to a DSI protocol analyzer? That would make it easier to analyze the Raspberry Pi output and see why it is having issues with the 941AS.

    Best,

    Jack

  • Hi Jack,

    There Is my mistake in part number of de-serializer

    Earlier I mentioned DS90UH948 but actual part number of my de-serializer is DS90UB926QSEVB that I am using with serializer DS90UB941AS-Q1EVM.

    Require support for corrected part number.

    I am not having access of DSI protocol analyzer I have access of DSO and digital logic analyzer.

    Below are observations as per suggested changes with updated image of scope.

    It looks see LP11 is coming correctly after change MODE_VIDEO_BURST to MODE_VIDEO_SYNC_PULSE.

    IMG-1

    IMG2

    IMG3

    IMG4

    IMG5


     

    Below is DSI resister log after changing MODE_VIDEO_BURST to MODE_VIDEO_SYNC_PULSE, I am not seeing any difference in DSI resister 0x2A

    *** Running 941_DSI_Registers.py ***
    DSI Port 0 Registers
    0x0 = 0x0
    0x1 = 0x0
    0x2 = 0x0
    0x3 = 0x1d
    0x4 = 0x14
    0x5 = 0x3a
    0x6 = 0x0
    0x7 = 0x0
    0x8 = 0x0
    0x9 = 0x0
    0xa = 0x0
    0xb = 0x0
    0xc = 0x0
    0xd = 0x0
    0xe = 0x0
    0xf = 0x10
    0x10 = 0x0
    0x11 = 0x0
    0x12 = 0x0
    0x13 = 0x0
    0x14 = 0x0
    0x15 = 0x0
    0x16 = 0x0
    0x17 = 0x0
    0x18 = 0x0
    0x19 = 0x0
    0x1a = 0x0
    0x1b = 0x0
    0x1c = 0x0
    0x1d = 0x0
    0x1e = 0x0
    0x1f = 0x0
    0x20 = 0x7f
    0x21 = 0x0
    0x22 = 0xff
    0x23 = 0x7f
    0x24 = 0x0
    0x25 = 0x0
    0x26 = 0x0
    0x27 = 0x0
    0x28 = 0x0
    0x29 = 0x0
    0x2a = 0x0
    0x2b = 0x0
    0x2c = 0x0
    0x2d = 0x0
    0x2e = 0x0
    0x2f = 0x0
    0x30 = 0x0
    0x31 = 0x20
    0x32 = 0x0
    0x33 = 0x4
    0x34 = 0x0
    0x35 = 0x20
    0x36 = 0x0
    0x37 = 0x0
    0x38 = 0x0
    0x39 = 0x0
    0x3a = 0x2
    DSI Port 1 Complete
    0x0 = 0x0
    0x1 = 0x0
    0x2 = 0x0
    0x3 = 0x1d
    0x4 = 0x14
    0x5 = 0x3a
    0x6 = 0x0
    0x7 = 0x0
    0x8 = 0x0
    0x9 = 0x0
    0xa = 0x0
    0xb = 0x0
    0xc = 0x0
    0xd = 0x0
    0xe = 0x0
    0xf = 0x10
    0x10 = 0x0
    0x11 = 0x0
    0x12 = 0x0
    0x13 = 0x0
    0x14 = 0x0
    0x15 = 0x0
    0x16 = 0x0
    0x17 = 0x0
    0x18 = 0x0
    0x19 = 0x0
    0x1a = 0x0
    0x1b = 0x0
    0x1c = 0x0
    0x1d = 0x0
    0x1e = 0x0
    0x1f = 0x0
    0x20 = 0x7f
    0x21 = 0x0
    0x22 = 0xff
    0x23 = 0x7f
    0x24 = 0x0
    0x25 = 0x0
    0x26 = 0x0
    0x27 = 0x0
    0x28 = 0x0
    0x29 = 0x0
    0x2a = 0x0
    0x2b = 0x0
    0x2c = 0x0
    0x2d = 0x0
    0x2e = 0x0
    0x2f = 0x0
    0x30 = 0x0
    0x31 = 0x20
    0x32 = 0x0
    0x33 = 0x4
    0x34 = 0x0
    0x35 = 0x20
    0x36 = 0x0
    0x37 = 0x0
    0x38 = 0x0
    0x39 = 0x0
    0x3a = 0x2
    *** Script execution time 0 min 3.773 sec ***
    >

    Is there any other settings needs to be done in DS90UB941AS or DS90UB926QSEVB, As I am not seeing any video on screen with suggested settings.

    Regards

    Abhimanyu

  • Hi Abhimanyu,

    From your reply on April 4, I can see that the DSI signals are roughly soldered to the side of the connector. DSI/D-PHY traces require differential routing and I am not confident that this method of soldering between Raspberry Pi and the 941AS EVM will allow for the 941AS to properly decode the DSI signals. Can you confirm this is how the Raspberry Pi is connected to the 941AS EVM?

    The 941AS uses the QSH-020-01-H-D-DP-A connector for the DSI interface. The Raspberry Pi uses a 2× mini 22-pin, 0.5mm (fine) pitch, 11.5mm width connector for DSI interface. I am not aware of a cable assembly that has these two connectors. An adapter board could be made to bridge between the boards.

    From DSI indirect register 0xF (DPHY_STATUS), I see that the data lanes are not active. This indicates that the D-PHY Start-of-Transmission (SoT) sequence is likely not detected. 

    I do not have further recommendations for 941AS settings.

    Best,

    Jack

  • Hello jack,

    Thanks for your input, I understand your concern.

    we are looking towards to prepare proper jig or PCB for this setup of 941AS and CM4.

    There i can run directly configure 941AS as per below script given by you

    # Example 941AS config script

    serAddr = 0x18
    desAddr = 0x58

    board.WriteI2C(serAddr, 0x01, 0x08) # Disable DSI

    # Program TSKIP_CNT on DSI Port 0
    # DSI Port 0 = 177.48Mbps/lane
    board.WriteI2C(serAddr, 0x40, 0x04)
    board.WriteI2C(serAddr, 0x41, 0x05)
    board.WriteI2C(serAddr, 0x42, 0x2) # TSKIP_CNT = 0x1. Left shift one
    board.WriteI2C(serAddr, 0x41, 0x21) #DSI_CONFIG_1
    board.WriteI2C(serAddr, 0x42, 32) #DSI HS Polarity is active low
    board.WriteI2C(serAddr, 0x01, 0x00) # Enable DSI

    board.WriteI2C(serAddr, 0x3, 0x96) # Enable I2C pass-through

    Now can you help to to generate configure resolution of 941AS for generate test pattern and and select internal external clock so, i can test test pattern first with New Jig Or PCB before going on CM4 DSI.

    Currently I am generating test pattern by ALP tool but on my PCB I will be having only access of i2c port of 941AS for configuration.

    Help me for this configuration related to pattern generation, for you reference panel resolution and timing details already is there in this post.

    Once my JIG done I will try with that and share the i2c dump for assistance if face any trouble.

    Regards

    Abhimanyu

  • Hello, 

    Due to US public holiday on Friday 4/18/25, support will resume on Monday. Thank you for your patience. 

    Regards, 

    Logan

  • Hi Abimanyu,

    See attached script for 941AS PATGEN with internal video timing and external PCLK source. Once the customer jig is up and running, let me know so we can see if the DSI signal is successfully received.

    Double check the timings in the script to make sure they are correct.

    Best,

    Jack

    941_PATGEN_SparkMinda.py
    serAddr = 0x18
    
    # Htotal = 908
    # Hactive = 800
    # HBP = 30
    # HFP = 73
    # HSync = 5 (Minimum is 3 when Control Signal Filter is Enabled. See 941AS Datasheet Section 8.3.5)
    # Vtotal = 501
    # Vactive = 480
    # VBP = 12
    # VFP = 8
    # Vsync = 1
    # PCLK = 27.2
    # Hsync = Negative, Vsync = Positive
    
    
    board.WriteI2C(serAddr, 0x64, 0x00)    #   Disable PATGEN
    board.WriteI2C(serAddr, 0x66, 0x03)
    board.WriteI2C(serAddr, 0x67, 0x76)    #   PATGEN_CDIV_N		
    board.WriteI2C(serAddr, 0x66, 0x04)		
    board.WriteI2C(serAddr, 0x67, 0x8c)    #	THW_7:0
    board.WriteI2C(serAddr, 0x66, 0x05)		
    board.WriteI2C(serAddr, 0x67, 0x53)    #	TVW_3:0
    board.WriteI2C(serAddr, 0x66, 0x06)		
    board.WriteI2C(serAddr, 0x67, 0x1F)    #	TVW_11:4
    board.WriteI2C(serAddr, 0x66, 0x07)		
    board.WriteI2C(serAddr, 0x67, 0x20)    #	AHW_7:0
    board.WriteI2C(serAddr, 0x66, 0x08)		
    board.WriteI2C(serAddr, 0x67, 0x03)    #	AVW_3:0
    board.WriteI2C(serAddr, 0x66, 0x09)		
    board.WriteI2C(serAddr, 0x67, 0x1E)    #	AVW_11:4
    board.WriteI2C(serAddr, 0x66, 0x0A)		
    board.WriteI2C(serAddr, 0x67, 0x05)    #	HSW_7:0
    board.WriteI2C(serAddr, 0x66, 0x0B)		
    board.WriteI2C(serAddr, 0x67, 0x01)    #	VSW_7:0
    board.WriteI2C(serAddr, 0x66, 0x0C)	
    board.WriteI2C(serAddr, 0x67, 0x1E)    #	HBP
    board.WriteI2C(serAddr, 0x66, 0x0D)		
    board.WriteI2C(serAddr, 0x67, 0x0C)    #	VBP
    board.WriteI2C(serAddr, 0x66, 0x0E)		
    board.WriteI2C(serAddr, 0x67, 0x01)    #	VS_POL/HS_POL
    board.WriteI2C(serAddr, 0x66, 0x1A)
    board.WriteI2C(serAddr, 0x67, 0x04)    #   PATGEN_CDIV_M
    board.WriteI2C(serAddr, 0x65, 0x0C)  #   Internal timing w/External PCLK
    board.WriteI2C(serAddr, 0x64, 0x11)  #   Enable PATGEN