Tool/software:
Hi
I want to understand the different error report sensitivity of the error reporting as detailed out in register 0xE1.
The use case is we want to enable the interrupt when there is no display output on the panel and report it to the soc for further investigation/ reset.
At first we thought of having PLL_UNLOCK and CHA_LLP_ERR flag to be set for the interrupt, however we understand that PLL_UNLOCK might be little sensitive in nature.
Is it possible to have AND operation on both the error flag bits - meaning INT goes high only when both the error flags are asserted?
Can you guys suggest any alternate false triggering proof method - which also uses less soc resources (we would ideally not want to poll the soc for this - which can be used to achieve this?
Otherwise if we go with PLL_UNLOCK bit- as it doesn't need any write back to clear the state - we are planning to monitor this bit for quite some cycles - and then take a decision to report error.
