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TPS546D24S: TPS546D24S – READ_IOUT shows –1.6 to –2.0 A at no load (offset error before calibration)

Part Number: TPS546D24S

Tool/software:

Hello TI Team,

I am using the TPS546D24S in a single-phase, single-rail configuration with 12 V input and 0–15 A output.
I am reading telemetry values through PMBus (READ_VOUT, READ_IOUT, READ_TEMPERATURE_1).

At zero load, the device consistently reports –1.6 A to –2.0 A on READ_IOUT.
Once I perform an IOUT_CAL_OFFSET (39h) adjustment and store it to NVM, the readings become accurate and stable.

However, my question is:

  • Why does the default offset show such a large negative current (–1.6 A to –2 A) before calibration?

  • Is this expected or normal behavior for the TPS546D24S?

  • Does this offset vary part-to-part, and should it always be calibrated during production?

  • Is there any hardware or layout-related factor (e.g. inductor, sense routing) that could increase this zero-load offset?

According to the datasheet, READ_IOUT accuracy is typically ±2.5 A to ±4 A depending on load and temperature (p. 68–69), but I’d like to confirm if this zero-load bias is part of the normal device characteristic or if it indicates a setup issue on my board.

Thank you for your help and clarification!

Best regards,
Salman

  • Hey Sal,

    When measuring the inductor current, the device utilizes valley current measurements on the low side FET and the start and end of the LOW-SIDE FET. If your inductance is low, the measurements could be taken when the part is below the zero threshold, resulting in a negative current reading.

    This is expected of the part. The offset would vary by what is listed in the datasheet electrical table. If current telemetry accuracy is important then you should always calibrate in production. 

    The only thing that would make your current telemetry more accurate is if you used a larger inductance to reduce the current ripple.

    Thanks,
    Caleb

  • Thanks for your feed-back Caleb could you please clarify the follow-up questions below?

    1. Could you please clarify whether the zero-load current offset varies significantly with temperature or part-to-part, and if so, should the IOUT_CAL_OFFSET calibration be performed only at room temperature or across temperature ranges in production?
    2. Since the negative bias originates from valley current sensing, does this offset always appear negative and is this something very common on these IC’s, and how much do factors like inductance value, ripple current, switching frequency, or PCB sense routing influence its magnitude?
    3. Are there any recommended inductance ranges or layout practices to minimize this measurement offset and improve READ_IOUT accuracy?
    4. After performing and storing the calibration in NVM, how stable and repeatable is the offset correction over time and temperature, and what is the expected unit-to-unit variation before calibration?
    5. Does TI provide any recommended test or validation procedure (or example PMBus script) to verify current telemetry accuracy and automate calibration during production?

    Thanks in advance!

    Regards,

    Salman

  • Hey Sal, 

    1. There is a line item in the datasheet that defines the current measurement accuracy over a few temperature ranges.

    If these accuracies work for you, then you can program at room temperature and expect the minimum and maximum variation at the operating temperature range in your application. Otherwise, you will have to have your ASIC have different calibration profiles for every temperature band in your application.

    2 and 3. I understand your concern on external factors influencing current measurement accuracy. The commonality of the "offset" is generational. Our current sense architecture is, for the most part, iterated upon from previous generations. Our customers have always been happy with a percentage accuracy over temp, with the understanding that if more accuracy is needed then an external current shunt should be used, at the cost of efficiency.

    Inductance value affects ripple current, switching frequency affects ripple current, PCB sense routing doesn't matter much since the current sense is happening internal to the device. Low inductance = high ripple, more error depending on where the averaging happens. Low FSW = high ripple, same as above. We do not test all possible BOMs so it is impossible to give you a definitive answer without making some assumptions.

    As for recommendations to improve current telemetry accuracy, we recommend you follow what is on the datasheet layout section, but we don't really cater this towards a "good telemetry application". I don't think there really is a layout that can "help" telemetry accuracy.

    4. We do not test this and should be validated on the customer end. Unit to unit variation is given in the datasheet screenshot above.

    5. We do not have a PMBUS test script for telemetry.

    I'm sorry that we don't have all the information you requested. I recommend taking the time to characterize the current accuracy within your application. At the end of the day, you can expect the accuracy over temp to be when is listed in the datasheet.

    Thanks,
    Caleb