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SN65HVD102: Design issue for SN65HVD102 and TIOL111D...

Peter Tseng
Mastermind 6430 points
Part Number: SN65HVD102
Other Parts Discussed in Thread: TIOL221, TIOL112, BOOSTXL-IOLINKM-8

Hi Team,

Please help to check the issue.

The schedmatics as below.

image.png

If R51 and LED4 existing, the communication is OK. However, removing R51 and LED4 will cause the communication fail.

May I have your comments about it.

Thanks.

  • 0
    TI__Mastermind 34910 points

    Hi Peter,

    Can you please share some more information about the passing and failing conditions of these devices?  

    I assume in your setup these two devices are directly connected together through a standard IO-Link interface cable that has L+, L-, and CQ.  Is that correct?

    Can you share some scope plots, and the pin voltage levels for the pins on the two devices when it is "failing" so that i can better understand your issue?

    Regards,

    Jonathan

  • 0 in reply to Jonathan Nerger
    Mastermind 6430 points

    Hi Sir,

    Here are the test results and test conditions.

    link OK waveform with R51 and LED4:

    Link fail without R51 and LED4:

     

    Please help to check the link issue.

    Thanks.

  • +1 in reply to Peter Tseng
    TI__Mastermind 34910 points

    Hi Peter,

    Thanks for the scope plots.  I think i now understand the issue if you are using the SN65HVD102 as the Master Transceiver without an external current sink on the CQ line. 

    The IO-Link standard defines the Master to have a weak current sink of approximately 10mA on the CQ line to pull the line Low when the Master is not transmitting data to the Device transceiver.

    The SN65HVD102 is not a Master Transceiver and it does not have an integrated current sink for this purpose so you would need to connect an external current sink to the CQ line.  The R51 and LED4 are effective serving this purpose which is why communication is successful.

    If you notice the "voltage level when the line is idle is not 0V without R51 and LED4, but is higher.  This is likely from charged capacitance pulling the line higher when both the Master and Device transceivers are not active and the CQ pins go Hi-Z.  There needs to be a weak current sink on CQ to ensure a "low" voltage is established.

    The TIOL112 and TIOL221 transceivers do have a "Master Mode" that enables this integrated current sink allowing these transceivers to be used in either a Device or Master application.  Neither the SN65HVD102 nor the TIOL111x transceivers have a Master Mode with an integrated current sink and are only intended for Device applications unless an external current sink is added to circuit.

    You can find an example of how to implement an external current sink with a couple of diodes, a transistor and a some resistors the TIOL111x (or any IO-Link Device Transceiver) in the BOOSTXL-IOLINKM-8 EVM User's Guide (Link).  

    Regards,

    Jonathan