Hi
Goal : Total throughput 40 * 148.5 = 5940Gbps => 1188Gbps / LVDS DDR Link which is compatible with XILINX serie 7 IO of KINTEX and ARTIX
Advantage : 12 / 40 (30%) pin ratio which permits to connect 3 high speed serial video inputs almost 1 in parallel mode
Actually the only solution founded with TI serializers it to use 2 x 90DS187 in single to dual 18b pixel mode which gives a 2 x (6D +C) => 28 pins and a pin ratio of 28 / 40 (70%)
Is there any new serializer design to solve this problem much efficienly?
Thanks