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Conf. DP83630-EVK to perform PPS

Other Parts Discussed in Thread: DP83630-EVK

I'm am trying to configure DP83630-EVK to output Pulse Per Second (PPS) on one of the GPIO ports.
I am using an FPGA based embedded system and greatly reduced EPL C library to configure the DP83630-EVK.
I use the following configuration, from Software Design Guide and C Software Reference Library:

    PTPClockSetRateAdjustment( pEPL_HANDLE, 0, FALSE, FALSE);                   //dolje
    PTPClockSet( pEPL_HANDLE, 1, 0);
    PTPSetClockConfig( pEPL_HANDLE, CLKOPT_CLK_OUT_EN, 0x0A, 0x00, 8);
    PTPEnable( pEPL_HANDLE, TRUE);
    // Configure Trigger 0 for PPS – only perform if using PPS
    PTPArmTrigger( pEPL_HANDLE, 0, 10, 0, FALSE, FALSE, 500000, 0);

After this I expect to see a PPS at GPIO9 but it doesn't happen. Only change is a pulse that appears at CLK_OUT pin (pictures bellow).


Am I wrong to expect PPS output after this configuration?
Is GPIO9 available for output?

Additional information:

DP83630-EVK jumpers used:
J12 - USB_3v3         J33 - auto-negotiation
J3   - PMDIO_MII       J36
J4   - PMDC_MII         J39

Reg_val after configuration:
PHY_PG5_PTP_TRIG: 0x5900

  • Further testing revealed that the pin that was supposed to be outputting PPS is being set LOW by the commands above.

  • Resolved: removing line 8 from the code works. The problem was that the PTP clock didn't start and PPS had no time to refer to wtih line 8.

    The error was caused, because of a misinterpretation of a function in Ethernet PHYTER ® Software Development Guide. In chapter 3.2 - 1588 Hardware Configuration, page 32 of this document, there is a function called PTPEnableTriggers() which is not defined in the document. That is why I (wrongly) assumed it was a typing error: that it was supposed to be PTPEnable.