clock stretch of DS100RT410

Hi Yoshihiro San,

I do not understand your meaning on clock stretch. Do you mean REFCLK or the SCL of the SMBus?

regards,

TK Chin

Hi Chin-san,

Thank you for your response.

I'm sorry at the lack of explanation.

I mean the SCL of the SMBus.

Best regards,

Yoshihiro Hirata

Hi,

We have simulated the clock stretching and DS100RT410 retimer device does not hold the SCL low; it is not in the design.

If there is another slave device on the bus that does the stretch by holding the CLK low. The DS100RT410 would not have any problem in the slave mode.

The master device on the bus must wait for the clock edge to go high in order to proceed.

Regards,

Michael